Supermicro SUPERSERVER 8048B-TR3 User Manual page 125

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Chapter 7: BIOS
LRDIMM (Load-Reduction DIMM) Module Delay
When this item is set to Disabled, the MRC (Memory Regulator Controller) will
not use SPD bytes 90-95 for module delay on LRDIMM memory. The options
are Disabled and Auto.
Data Scrambling
Select Enabled to enable data scrambling to enhance system performance and
data integrity. The options are Disabled and Enabled.
VMSE Lockstep Mode
Select Enabled to support the VMSE Lockstep mode, which will support Lock
step mode for the Intel Scalable Memory Interconnect 2 (Intel SMI 2) controller.
The options are 2:1 Mode.
HA (Hash Mode) Early Write Post Mode
Select Enable to support memory hash-method-comparison mode when the
system is running at the early stage of POST (Power-On-Self-Test). The options
are is Enable and Disable.
Command 2 Data Tuning
Select Enabled to fi ne-tune electrical command paths from the host system to
the memory-extension buffer (MXB). The options are Enabled and Disabled.
Closed Loop Thermal Throttling
Select Enabled to support Closed-Loop Thermal Throttling which will improve
reliability and reduces CPU power consumption via automatic voltage control
while the CPU are in idle states. The options are Disabled and Enabled.
Mem Hot Sense Therm Throt
Select Enabled to activate thermal-throttling when the hot-sensor reaches the
predefi ned threshold via automatic voltage control when the CPU is in idle states.
The options are Enabled and Disabled.
VMSE Clock Stop
Select Enabled to de-activate the clock driver for the Intel Scalable Memory
Interconnect 2 (Intel SMI 2) controller. The options are Enabled and Disabled.
7-15

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