Compare Registers - Motorola MVME3100 Programmer's Manual

COC
Clear counter on compare. When this bit is high, the counter is reset to 0 when it compares with the
compare register. When this bit is low, the counter is not reset.
COVF
Clear overflow bits. The overflow counter is cleared when a 1 is written to this bit.
OVF
Overflow bits. These bits are the output of the overflow counter. The overflow counter is incremented
each time the tick timer sends an interrupt to the local bus interrupter. The overflow counter can be
cleared by writing a 1 to the COVF bit.
ENINT
Enable interrupt. When this bit is high, the interrupt is enabled. When this bit is low, the interrupt is
not enabled.
CINT
Clear interrupt.
INTS
Interrupt status.
RSVD
Reserved for future implementation.

Compare Registers

The tick timer counter is compared to the Compare register. When they are equal, the tick timer interrupt
is asserted and the overflow counter is incremented. If the clear-on-compare mode is enabled, the
counter is also cleared. For periodic interrupts, this equation should be used to calculate the compare
register value for a specific period (T):
Compare register value = T (us)
Chapter 1 Board Description and Memory Maps
MVME3100 Programmer's Guide (V3100A/PG1)
21