Ic Block Diagram（Ic ブロック図 - Yamaha ACD1 Service Manual

ACD1
IC BLOCK DIAGRAM（IC ブロック図）
SN74LVC32APWR (X5405A00)
ENT2: IC115
Quad 2 Input OR
1A
1
1B
2
1Y
3
2A
4
2B
5
2Y
6
GND
7
TC74HC123AF (XN242A0R)
BRG: IC107
Dual Retriggerable Single Shot
1A
1
1B
2
1
3
CLR
1Q
4 Q
Q
2Q
5
Q
Q
2 Cext CLR
6
2 Rext / Cext
7
GND
8
74VHC245MTCX_NF40 (X0296A0R)
CPU: IC003
SN74LVC245APWR (XZ287A0R)
CPU: IC021–026
TC74VHCT245AFT (XT744B0R)
BRG: IC109, IC110, IC112, IC115
TC74VHC245FT (XU797B00)
BRG: IC103, IC402, IC403
DS1: IC501
DS2: IC601
SN74LV245APWR (X3693A0R)
ENT2: IC101–104
Octal 3-State Bus Transceiver
18
SN74LVC74APWR (X5731A00)
ENT2: IC112, IC113
Dual D-Type Flip-Flop
Vcc
14
1CLR
4B
13
1D
4A
12
1CK
4Y
11
1PR
3B
10
1Q
3A
9
1Q
3Y
8
GND
SN74LV138APWR (X7284A00)
BRG: IC204, IC205
3 to 8 Demultiplexer
Vcc
16
1 Rext / Cext Select
15
Cext
14
1Q G2A
13
Enable
2Q
12
G2B
CLR G1
11
Output
2B Y7
10
GND
9 2A
D1R
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
14
VCC
2
D 13
2CLR
D
3
12
CK
2D
4 11
PR 2CK
CK
5 Q 10
2PR
PR
6
9
Q
Q 2Q
7
8 2Q
Q
1
A 16 Vcc
A
2 B 15
B Y0 YO
3
C Y1 14
C Y1
4
G2A Y2 13 Y2
Output
5
G2B Y3 12
Y3
6
G1 Y4 11
Y4
7 10 Y5
Y7 Y5
Y6
8
9 Y6
1 20 V
CC
2 19 G
3 18 B1
4 17 B2
5 16 B3
6 B4
15
7 B5
14
8 B6
13
9 B7
12
10 11 B8
INPUTS OUTPUTS
PR CLR CLK D Q Q
L H X X H L
H L X X L H
L L X X H H
H H f H H L
H H f L L H
H H L X Q Q
O O
TC74VHC273FT (X7942B00)
DS1 : IC502, IC503
DS2 : IC602, IC606, IC607
Octal D-Type Flir Flop
1
CLEAR
2
1Q
Q
CL CL
3
D CK CK
1D
4
2D
D CK CK
CL CL
5
Q
2Q
6
3Q
Q
CL CL
7
D CK CK
3D
8
4D
D CK CK
CL CL
9
4Q Q
10
GND
TC74VHC541FT (X4964B00)
BRG: IC104–106
DS1: IC505, IC506
DS2: IC609, IC610
Octal 3-State Buffer
G1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
GND
10
20
VCC
19
8Q
Q
18
D
8D
17
7D
D
16
Q 7Q
15
6Q
Q
14
D 6D
13
5D
D
12
Q 5Q
11
CLOCK
20 Vcc
G2
19
Y1
18
Y2
17
Y3
16
Y4
15
Y5
14
Y6
13
Y7
12
Y8
11