Intermec CK30 Service Manual page 82

Chapter 4 — Theory of Operation
72
SDRAM Densities
The SDRAM controller in the current version of the FPGA code supports
64Mbit, 128Mbit and 256Mbit SDRAM densities. The current CK30
configurations use 128Mbit and 256Mbit parts, but the main board is
designed to support up to 128MB (using 512Mbit parts). If system
SDRAM is expanded to this size, the FPGA SDRAM controller will
require some modification to handle the 512Mbit density correctly.
Shared SDRAM Partition
Also, 128MB SDRAM straddles two of the PXA255 SDRAM partitions (0
and 1). But the PXA255 shares only Partition 0 with alternate bus masters
like the FPGA. So if CK30 SDRAM is expanded to 128MB, the FPGA
SDRAM controller is only able to transfer data to and from Partition 0, so
the Ethernet and radio drivers have to ensure that the SDRAM buffer areas
they use are always in Partition 0.
Mini PCI Arbitration
The bridge provides round-robin arbitration among PCI slots. This feature
is not used in the CK30, since it has only one PCI slot but may play a role
in future products that may have two slots. A separate arbiter is provided
to arbitrate between the PCI interface and the scanner interface also
implemented in the FPGA. This arbiter always gives priority to the
scanner interface since missed frames of scanner data, especially 2D imager
data, are more noticeable than delayed Ethernet or 802.11 transactions.
This arbitration is based on an internal FPGA signal that indicates when
scanner-based DMA activity is active or pending. When that condition is
true, the arbiter prevents the PCI bridge from requesting the system bus. If
the PCI bridge already owns the bus when the scanner needs a DMA
transfer, the scanner task has to wait for the PCI transaction to complete.
But since PCI transactions are limited to a burst size of eight, the PCI
bridge is typically on the bus for less than a microsecond, and the scanner
task is not delayed for long.
Mini PCI Slot Power Management
3.3V power to the Mini-PCI slot is controlled by software through
PXA255 GPIO15 (signal CF_PWR_EN*) driving high-side switch U12.
It is normally turned off during Suspend, but in future OS releases it may
be left powered during Suspend to support radio wakeup of the CK30. In
order to give software a chance to shut cards down gracefully on Suspend,
power is not automatically shut down in hardware if the main battery
becomes critically low or is removed while the system is running. If slot
power is still on when the system suspends, it is shut off in hardware by
the "Type 2" interlock mechanism described in "Device Power Control"
on page 58. This protects the system state if the main battery is low or
removed while the Mini-PCI device (radio) is left powered during
Suspend.
CK30 Handheld Computer Service Manual