I2C Bus; Fpga - Intermec CK30 Service Manual

FPGA IO Signal Descriptions
Function Signal Description
VOL0 Beep volume control
VOL1
VOL2
Scan_LED Scanner Good Read LED
Scan_LED_High Good Read LED intensity control
User_LED1 User LED1 control
User_LED2 User LED2 control

I2C Bus

FPGA

CK30 Handheld Computer Service Manual
The I2C bus is used for power management functions and for control of
the 2D imager, in CK30s so equipped. The PXA255 I2C controller is the
bus master; the slave devices on the bus are:
Slave Device
Power Supply Controller (PSC) U38
2D imager engine
The I2C bus CLK and DATA lines are pulled up through pull-up resistors
R10 and R12. Pads for an active pull-up are provided (U1), but as of the
current release this device is not installed. The PXA255 clocks the I2C bus
at approximately 93kHz.
The CK30 architecture uses an SRAM-based FPGA for the Mini PCI and
scanner interfaces and for the keypad interface and a few GPIO functions.
For details of each functional block within the FPGA, see the document
section covering that function:
Mini PCI interface:
Scanner interfaces:
Keypad interface:
Volume control:
Chapter 4 — Theory of Operation
Usage
000 = lowest volume
111 = highest volume
0 = LED off
1 = LED on
0 = low intensity
1 = high intensity
0 = LED off
1 = LED on
0 = LED off
1 = LED on
Address
0x12
0x40
See "Mini PCI Interface" on page 69.
See "Scanners" on page 74.
See "Key Matrix Scanning" on page 67.
See "Beeper" on page 92.
See this Section
"PSC 12C Syntax" on page 59.
"2D Imagers" on page 80.
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