Debug Support; Field-Access Debug Port - Intermec CK30 Service Manual

Debug Support

Field-Access Debug Port

CK30 Handheld Computer Service Manual
• Hardware tone duration control in the FPGA: This was a contingency
against concerns about WindowsCE interrupt latencies leading to
noticeably sloppy software-controlled tone durations. In that event,
PXA255 PWM1 would continue to generate the tones, but a timer built
into the FPGA would gate the signal to provide precise duration
control. R300 would be installed instead of R126 so that FPGA output
FPGA_BEEP would drive the audio amplifier. So far, this feature has
not been needed.
Audio amplifier U19 can also be driven from audio codec U18. This
feature is included to enable future CK30 versions with VoIP support, and
is not currently installed.
All PXA255 and FPGA JTAG signals, as well as the I2C bus and PIC U38
programming signals are available through 16-pin non-ZIF flex connector
P1, accessible through the SD slot door. A special connector board
(073048-001) and flex cable (073049-001) are used to attach JTAG
emulators, boundary scan tools, or I2C monitoring tools, and to reflash
either system flash or U38 (PSC) firmware.
JTAG Interface Signal Descriptions
Pin Signal Name
1 +3.3V
2 JTAG_TCK
3 JTAG_TDI
4 JTAG_TDO
5 JTAG_TMS
6 FPGA_TDI
7 FPGA_TDO
8 -RESET_IN
9 -JTAG_TRST
10 I2C_DAT
11 I2C_CLK
12 SERIAL_PROG_CLK
13 SERIAL_PROG_DATA
14 GND
15 PIC_VCC
16 PIC_VPP
Chapter 4 — Theory of Operation
Description
Target 3.3V to power JTAG or I2C dongle
PXA255 and FPGA TCK
PXA255 TDI
PXA255 TDO
PXA255 and FPGA TMS
FPGA TDI
FPGA TDO
PXA255 reset
PXA255 JTAG reset
I2C bus between PXA255 and PSC PIC
I2C bus between PXA255 and PSC PIC
PSC PIC programming serial bus
PSC PIC programming serial bus
5V PIC Vcc
13V programming VPP for PSC PIC
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