IBM Midrange System DS4000 Series Hardware Manual page 87

Midrange system storage ds4000/ds5000 series
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The optional dual-ported 8 Gbps Host Interface Card (HIC), shown in Figure 3-42, uses an
two port FC chip. This chip connects via PCI-E x8 to the XOR engine.
Figure 3-42 DS5020 Dual-Port 8 Gbps HIC architecture
If you have the iSCSI option, as shown in Figure 3-43, there is an QLogic top-off-engine
(TOE) build into the DS5020. It will be built in as a daughter card of the controller mainboard.
It reduces the workload of the controller CPU by calculating the whole Ethernet traffic and
transfers just the SCSI packet through it.
PS_ENABLE
PWR_GOOD
PEX8114
PCIe x4
PCI-X to PCIe
12C 2
Figure 3-43 DS5020 iSCSI HIC architecture
Because of the similarities between the DS5000 controller models, we refer to 3.4.1, "DS5100
and DS5300 controller architecture" on page 31 for details about write cache, cache handling,
write operations, and cache block flow.
PCI-E x8
12C 1
VPD
12C 2
(8kB)
PS_ENABLE
Power
Control
Logic
16K Config
EEPROM
(MAC Addr)
32KB
EEPROM
QLogic EP4032
64b/133MHz PCI-X
Bridge
VPD
(8kB)
Chapter 3. IBM System Storage DS4000 and DS5000 hardware
PMC QE8
Power
Control
Logic
ZBT SSRAM
2MB
GMII
Dual GbE
iSCSI TOE
GMII
DDR Reassembly
Buffer
64MB + ECC
8Gb/s
SFP
8Gb/s
SFP
PHY0: 1Eh
RJ45
100/1000
MDI
Ethernet
PHY1: 1Fh
RJ45
100/1000
MDI
Ethernet
69

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