Intel 80C186EA User Manual page 374

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Name
ROR
Rotate Right:
ROR dest, count
Operates similar to ROL except that
the bits in the destination byte or word
are rotated right instead of left.
Instruction Operands:
ROR reg, n
ROR mem, n
ROR reg, CL
ROR mem, CL
SAHF
Store Register AH Into Flags:
SAHF
Transfers bits 7, 6, 4, 2, and 0 from
register AH into SF, ZF, AF, PF, and CF,
respectively, replacing whatever
values these flags previously had.
Instruction Operands:
none
NOTE: The three symbols used in the Flags Affected column are defined as follows:
– the contents of the flag remain unchanged after the instruction is executed
? the contents of the flag is undefined after the instruction is executed
ü
the flag is updated after the instruction is executed
Table C-4. Instruction Set (Continued)
Description
INSTRUCTION SET DESCRIPTIONS
Operation
(temp) ← count
do while (temp) ≠ 0
(CF) ← low-order bit of (dest)
(dest) ← (dest) / 2
high-order bit of (dest) ← (CF)
(temp) ← (temp) – 1
if
count = 1
then
if
high-order bit of (dest) ≠
next-to-high-order bit of (dest)
then
(OF) ← 1
else
(OF) ← 0
else
(OF) undefined
(SF):(ZF):X:(AF):X:(PF):X:(CF) ← (AH)
Flags
Affected
AF –
ü
CF
DF –
IF –
ü
OF
PF –
SF –
TF –
ZF –
ü
AF
ü
CF
DF –
IF –
OF –
ü
PF
ü
SF
TF –
ü
ZF
C-39

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