Signal Specifications; Agtl+ Signals Dc Specifications; Itanium 2 Processors) - Intel Itanium 2 Processor Datasheet

Electrical Specifications
NOTES:
1. This is the tolerance requirement, across a 200 MHz bandwidth, at the processor pins. The requirement at the processor pins
accounts for voltage drops (and impedance discontinuities) at the processor pins and to the processor core. In addition to the
±1.5% DC tolerance, there is a ±3.5% AC tolerance for a total of ±5% tolerance.
2. The Itanium
die and off-die termination which is selected by the TERMA and TERMB pins. Termination tolerance is ±15% for on-die
termination measured at V
3. Maximum termination voltage current on one terminating agent.
4. For all core frequencies and cache sizes.
5. Maximum thermal design envelope is provided for the design of thermal/chassis solutions.
6. Maximum thermal design power is an estimate of the power dissipation for the Itanium 2 processor offering while executing a
worst-case application mix under nominal V
®
Table 2-3. Itanium
Symbol
V
CC,PS
I
CC,PS
PS
slew_rate
PS
TT
NOTES:
1. The power pod DC set point accuracy is ±1.5%. Included for reference only, under worst case switching activity, the power pod
tolerance is ±7%.
2. The V
CC,PS
3. The maximum current (I
defined to be based on worst-case V
2.4

Signal Specifications

This section describes the DC specifications of the system bus signals. The processor signal's DC
specifications are defined at the Itanium 2 processor pins.
DC specifications for the AGTL+, PWRGOOD, HSTL clock, TAP port, system management, and
LVTTL signals. Please refer to the ITP700 Debug Port Design Guide for the TAP connection
signals DC specifications at the debug port.
Table 2-4. AGTL+ Signals DC Specifications (Sheet 1 of 2)
Symbol
V
IL
V
IH
V
IL
V
IH
V
OL
V
OH
I
OL
I
OL
18
®
2 processor system bus is terminated at each end of the system bus. The Itanium 2 processor supports both on-
and ±1% for off-die termination.
OL
CC,PS
2 Processor Power Supply Specifications
Parameter
V from the Power Supply
CC
Current Required from Power Supply
Power Supply Slew Rate at the
Processor Power Pod Connector
Power Supply Slew Rate for the
Termination Voltage at the Processor
Pins
for the processor is defined by the VID bits specified in
) specification is intended for system power supply design. The maximum current values are
CC,PS
, temperature and application mix.
CC,PS
Parameter
Input Low Voltage
Input High Voltage
Input Low Voltage
(1.6x GHz, I.5 GHz/4 MB
®
Itanium 2 Processors)
Input High Voltage
(1.6x GHz, I.5 GHz/4 MB

Itanium 2 Processors)

Output Low Voltage
Output High Voltage
Output Low Current @ 0.3V
Output Low Current @ 0.3V
and worst-case temperature.
Minimum
VID –1.5%
Table 2-23.
Table 2-4
Core
Minimum
Frequency
All
All 0.875
All
All 0.85
All
All V , V
CTERM
minimum
All 34
All 17
Typ Maximum Unit
VID VID +1.5% V
100 A
100 A/µs
0.05 A/ns
through Table 2-9 describe the
Typ Maximum Unit
0.625 V
V
0.65 V
V
0.3 0.4 V
V , V
CTERM CTERM
maximum
mA
mA
Datasheet
Notes
1, 2
3
Notes
1
1
1
1
2
3
4