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Electrical Specifications
2.6
Power Segment Identifier (PSID)
Power Segment Identifier (PSID) is a mechanism to prevent booting under mismatched
power requirement situations. The PSID mechanism enables BIOS to detect if the
processor in use requires more power than the platform voltage regulator (VR) is
capable of supplying. For example, a 130W TDP processor installed in a board with a
65W or 95W TDP capable VR may draw too much power and cause a potential VR issue.
2.7
Voltage and Current Specification
2.7.1
Absolute Maximum and Minimum Ratings
Table 2-2
functional limits of the processor. Within functional operation limits, functionality and
long-term reliability can be expected.
At conditions outside functional operation condition limits, but within absolute
maximum and minimum ratings, neither functionality nor long-term reliability can be
expected. If a device is returned to conditions within functional operation limits after
having been subjected to conditions outside these limits, but within the absolute
maximum and minimum ratings, the device may be functional, but with its lifetime
degraded depending on exposure to conditions exceeding the functional operation
condition limits.
At conditions exceeding absolute maximum and minimum ratings, neither functionality
nor long-term reliability can be expected. Moreover, if a device is subjected to these
conditions for any length of time then, when returned to conditions within the
functional operating condition limits, it will either not function, or its reliability will be
severely degraded.
Although the processor contains protective circuitry to resist damage from static
electric discharge, precautions should always be taken to avoid high static voltages or
electric fields.
Table 2-2.
Absolute Maximum and Minimum Ratings
Symbol
V
CC
V
TT
T
CASE
T
STORAGE
NOTES:
1.
For functional operation, all processor electrical, signal quality, mechanical and thermal
specifications must be satisfied.
2.
Overshoot and undershoot voltage guidelines for input, output and I/O signals are outlined
in
permanent damage to the processor.
3.
Storage temperature is applicable to storage conditions only. In this scenario, the
processor must not receive a clock, and no lands can be connected to a voltage bias.
Datasheet
specifies absolute maximum and minimum ratings only and lie outside the
Parameter
Core voltage with respect to
V
SS
FSB termination voltage with
respect to V
SS
Processor case temperature
Processor storage
temperature
Chapter
3. Excessive overshoot or undershoot on any signal will likely result in
Min
Max
–0.3
1.45
–0.3
1.45
See
See
Section 5
Section 5
–40
85
1, 2
Unit
Notes
V
-
V
-
°C
-
°C
3, 4, 5
17
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