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Electrical Specifications
Table 2-9.
GTL+ Signal Group DC Specifications
Symbol
I
LI
I
LO
R
ON
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V
IL
low value.
3.
V
IH
high value.
4.
V
IH
comply with the signal quality specifications in
5.
Refer to processor I/O Buffer Models for I/V characteristics.
6.
The V
7.
Leakage to V
8.
Leakage to V
Table 2-10. Open Drain and TAP Output Signal Group DC Specifications
Symbol
V
OL
I
OL
I
LO
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Measured at V
3.
For Vin between 0 and V
Table 2-11. CMOS Signal Group DC Specifications
Symbol
V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
I
LI
I
LO
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
All outputs are open drain.
Datasheet
Parameter
Input Leakage
Current
Output Leakage
Current
Buffer On Resistance
is defined as the voltage range at a receiving agent that will be interpreted as a logical
is defined as the voltage range at a receiving agent that will be interpreted as a logical
and V
may experience excursions above V
OH
referred to in these specifications is the instantaneous V
TT
with land held at V
SS
with land held at 300mV.
TT
Parameter
Output Low Voltage
Output Low Current
Output Leakage Current
* 0.2V.
TT
.
OH
Parameter
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Current
Output Low Current
Input Leakage Current
Output Leakage Current
Min
Max
N/A
± 100
N/A
± 100
7.49
9.16
. However, input signal drivers must
TT
Chapter
3.
.
TT
Min
0
16
N/A
Min
-0.10
V
* 0.70
TT
-0.10
0.90 * V
TT
V
* 0.10 /
V
TT
67
V
* 0.10 /
V
TT
67
N/A
N/A
Unit
Notes
µA
µA
Ω
.
TT
Max
Unit
Notes
0.20
V
50
mA
± 200
µA
Max
Unit
Notes
V
* 0.30
V
3, 6
TT
V
+ 0.10
V
4, 5, 6
TT
V
* 0.10
V
TT
V
+ 0.10
V
2, 5, 6
TT
* 0.10 /
TT
A
6, 7
27
* 0.10 /
TT
A
6, 7
27
± 100
µA
± 100
µA
1
7
8
5
1
-
2
3
1
6
8
9
25
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