Gtl+ Bus Voltage Definitions - Intel Quad-Core Xeon 3300 Series Datasheet

Electrical Specifications
Valid high and low levels are determined by the input buffers by comparing with a
reference voltage called GTLREF.
reference voltage (GTLREF) should be generated on the system board using high
precision voltage divider circuits. For more details on platform design, see the
applicable platform design guide.
Table 2-13. GTL+ Bus Voltage Definitions
Symbol
GTLREF_PU
GTLREF_PD
R
TT
COMP[3:0]
COMP8
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. GTLREF is to be generated from VTT by a voltage divider of 1% resistors. If an Variable
GTLREF circuit is used on the board the GTLREF lands connected to the Variable GTLREF
circuit may require different resistor values. Each GTLREF land must be connected, refer to
the platform design guide for implementation details.
3. R
TT
Refer to the appropriate platform design guide for the board impedance. Refer to processor
I/O buffer models for I/V characteristics.
4. COMP resistance must be provided on the system board with 1% resistors. See the
applicable platform design guide for implementation details. COMP[3:0] and COMP8
resistors are to V
Datasheet
Parameter
GTLREF pull up resistor
GTLREF pull down resistor
Termination Resistance
COMP Resistance
COMP Resistance
is the on-die termination resistance measured at V
.
SS
Table 2-13 lists the GTLREF specifications. The GTL+
Min Typ
57.6 * 0.99 57.6
100 * 0.99 100
45 50
49.40 49.90
24.65 24.90
TT
Max Units
57.6 * 1.01 Ω
100 * 1.01 Ω
55 Ω
50.40 Ω
25.15 Ω
/3 of the GTL+ output driver.
1
Notes
2
2
3
4
4
27