Phase Lock Loop (Pll) Filter Requirements - Intel HH80552PG0962M - Pentium 4 3.4 GHz Processor Datasheet

Electrical Specifications
.
Figure 3.

Phase Lock Loop (PLL) Filter Requirements

–0.5 dB
NOTES:
1. Diagram not to scale.
2. No specification for frequencies beyond fcore (core frequency).
3. f
peak
4. f
core
Datasheet
0.2 dB
0 dB
Forbidden
Zone
–28 dB
–34 dB
DC 1 Hz
Passband
, if existent, should be less than 0.05 MHz.
represents the maximum core frequency supported by the platform.
Forbidden
Zone
fpeak 1 MHz 66 MHz
Frequency
fcore
High
Band
Filter_Spec
31