Intel HH80552PG0962M - Pentium 4 3.4 GHz Processor Datasheet page 63

Pentium 4 processor 6x1 sequence, on 65 nm process in the 775-land lga package supporting hyper-threading technology and 64 arhitecture
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Land Listing and Signal Descriptions
Table 24.Numerical Land Assignment
Land
Land Name
#
U29
U3
U30
U4
U5
U6
U7
U8
V1
V2
V23
V24
V25
V26
V27
V28
V29
V3
V30
V4
V5
V6
V7
V8
W1
W2
TESTHI12
W23
W24
W25
W26
W27
W28
W29
W3
W30
W4
W5
Datasheet
Signal Buffer
Type
VCC
Power/Other
AP1#
Common Clock Input/Output
VCC
Power/Other
A13#
Source Synch Input/Output
A12#
Source Synch Input/Output
A10#
Source Synch Input/Output
VSS
Power/Other
VCC
Power/Other
MSID1
Power/Other
LL_ID0
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
A15#
Source Synch Input/Output
A14#
Source Synch Input/Output
VSS
Power/Other
VSS
Power/Other
VCC
Power/Other
MSID0
Power/Other
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
TESTHI1
Power/Other
VCC
Power/Other
VSS
Power/Other
A16#
Source Synch Input/Output
Table 24.Numerical Land Assignment
Land
Direction
Land Name
#
W6
A18#
W7
VSS
W8
VCC
Y1
BOOTSELECT
Y2
VSS
Y23
VCC
Y24
VCC
Y25
VCC
Output
Y26
VCC
Output
Y27
VCC
Y28
VCC
Y29
VCC
Y3
FC17
Y30
VCC
Y4
A20#
Y5
VSS
Y6
A19#
Y7
VSS
Y8
VCC
Output
Input
Input
Signal Buffer
Direction
Type
Source Synch Input/Output
Power/Other
Power/Other
Power/Other
Input
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Source Synch Input/Output
Power/Other
Source Synch Input/Output
Power/Other
Power/Other
63

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