Intel HH80552PG0962M - Pentium 4 3.4 GHz Processor Datasheet page 60

Table 24.Numerical Land Assignment
Land
Land Name
#
E8
E9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F2
F20
F21
F22
F23 RESERVED
F24
F25
F26
F27
F28
F29 RESERVED
F3
F4
F5
F6
F7
F8
F9
G1
G10 RESERVED
G11
G12
G13
G14
G15
G16
G17
G18
60
Signal Buffer
Type
VSS Power/Other
D19# Source Synch Input/Output
VSS Power/Other
D23# Source Synch Input/Output
D24# Source Synch Input/Output
VSS Power/Other
D28# Source Synch Input/Output
D30# Source Synch Input/Output
VSS Power/Other
D37# Source Synch Input/Output
D38# Source Synch Input/Output
VSS Power/Other
FC5 Common Clock
D41# Source Synch Input/Output
D43# Source Synch Input/Output
VSS Power/Other
TESTHI7 Power/Other
TESTHI2 Power/Other
TESTHI0 Power/Other
VTT_SEL Power/Other
BCLK0 Clock
BR0# Common Clock Input/Output
VSS Power/Other
RS1# Common Clock
IMPSEL Power/Other
VSS Power/Other
D17# Source Synch Input/Output
D18# Source Synch Input/Output
VSS Power/Other
DBI1# Source Synch Input/Output
DSTBN1# Source Synch Input/Output
D27# Source Synch Input/Output
D29# Source Synch Input/Output
D31# Source Synch Input/Output
D32# Source Synch Input/Output
D36# Source Synch Input/Output
D35# Source Synch Input/Output
Land Listing and Signal Descriptions
Table 24.Numerical Land Assignment
Land
Direction Land Name
#
G19 DSTBP2#
G2
G20 DSTBN2#
G21 D44#
G22 D47#
G23 RESET#
G24 TESTHI6
G25 TESTHI3
G26 TESTHI5
G27 TESTHI4
G28 BCLK1
G29 BSEL0
Input G3 TESTHI8
G30 BSEL2
G4 TESTHI9
G5
G6 RESERVED
Input G7 DEFER#
Input G8 BPRI#
Input G9 D16#
Output H1 GTLREF0
Input H10
H11
H12
H13
Input H14
Input H15 DP1#
H16 DP2#
H17
H18
H19
H2 GTLREF1
H20
H21
H22
H23
H24
H25
H26
H27
Signal Buffer
Direction
Type
Source Synch Input/Output
FC1 Power/Other
Source Synch Input/Output
Source Synch Input/Output
Source Synch Input/Output
Common Clock
Power/Other
Power/Other
Power/Other
Power/Other
Clock
Power/Other
Power/Other
Power/Other
Power/Other
FC7 Source Synch
Common Clock
Common Clock
Source Synch Input/Output
Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
Common Clock Input/Output
Common Clock Input/Output
VSS Power/Other
VSS Power/Other
VSS Power/Other
Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
Datasheet
Input
Input
Input
Input
Input
Input
Input
Output
Input
Output
Input
Output
Input
Input
Input
Input