Signal Characteristics; Signal Reference Voltages - Intel HH80552PG0962M - Pentium 4 3.4 GHz Processor Datasheet

Pentium 4 processor 6x1 sequence, on 65 nm process in the 775-land lga package supporting hyper-threading technology and 64 arhitecture
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Table 7.
FSB Signal Groups (Sheet 2 of 2)
Signal Group
TAP Output
FSB Clock
Power/Other
NOTES:
1.
Refer to
2.
In processor systems where no debug port is implemented on the system board, these
signals are used to support a debug port interposer. In systems with the debug port
implemented on the system board, these signals are no connects.
3.
The value of these signals during the active-to-inactive edge of RESET# defines the
processor configuration options. See
.
Table 8.

Signal Characteristics

A[35:3]#, ADS#, ADSTB[1:0]#, AP[1:0]#,
BINIT#, BNR#, BOOTSELECT
D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,
DP[3:0]#, DRDY#, DSTBN[3:0]#,
DSTBP[3:0]#, HIT#, HITM#, LOCK#, MCERR#,
MSID[1:0]
RSP#, TRDY#, IMPSEL
THERMTRIP#, FERR#/PBE#, IERR#, BPM[5:0]#,
BR0#, TDO, LL_ID[1:0], FCx
NOTES:
1. These signals have a 500–5000 Ω pull-up to V
2. Signals that do not have R
Table 9.

Signal Reference Voltages

BPM[5:0]#, LINT0/INTR, LINT1/NMI, RESET#,
BINIT#, BNR#, HIT#, HITM#, MCERR#, PROCHOT#,
BR0#, A[35:0]#, ADS#, ADSTB[1:0]#, AP[1:0]#,
BPRI#, D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,
DP[3:0]#, DRDY#, DSTBN[3:0]#, DSTBP[3:0]#,
LOCK#, REQ[4:0]#, RS[2:0]#, RSP#, TRDY#
NOTES:
These signals also have hysteresis added to the reference voltage. See
1.
information.
24
Type
Synchronous to
TCK
Clock
Section 4.2
for signal descriptions.
Signals with R
TT
1
, BPRI#,
1
, PROCHOT#, REQ[4:0]#, RS[2:0]#,
1
2
Open Drain Signals
, nor are actively driven to their high-voltage level.
TT
GTLREF
Signals
TDO
2
BCLK[1:0], ITP_CLK[1:0]
VCC, VTT, VCCA, VCCIOPLL, VID[5:0], VSS, VSSA,
GTLREF[1:0], COMP[5:4,1:0], RESERVED, TESTHI[13:0],
THERMDA, THERMDC, VCC_SENSE,
VCC_MB_REGULATION, VSS_SENSE,
VSS_MB_REGULATION, BSEL[2:0], SKTOCC#, DBR#
VTTPWRGD, BOOTSELECT, VTT_OUT_LEFT,
VTT_OUT_RIGHT, VTT_SEL, LL_ID[1:0], MSID[1:0], FCx,
IMPSEL
Section 6.1
for details.
Signals with No R
A20M#, BCLK[1:0], BPM[5:0]#, BSEL[2:0],
COMP[5:4,1:0], FERR#/PBE#, IERR#,
IGNNE#, INIT#, ITP_CLK[1:0], LINT0/INTR,
LINT1/NMI, PWRGOOD, RESET#, SKTOCC#,
SMI#, STPCLK#, TDO, TESTHI[13:0],
THERMDA, THERMDC, THERMTRIP#,
VID[5:0], VTTPWRGD, GTLREF[1:0], TCK,
TDI, TMS, TRST#, VTT_SEL
rather than on-die termination.
TT
BOOTSELECT, VTTPWRGD, A20M#,
IGNNE#, INIT#, MSID[1:0],
PWRGOOD
1
TDI
, TMS
Electrical Specifications
1
TT
V
/2
TT
1
1
, SMI#, STPCLK#, TCK
,
1
1
, TRST#
for more
Table 12
Datasheet
2
,

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