Intel HH80552PG0962M - Pentium 4 3.4 GHz Processor Datasheet page 59

Pentium 4 processor 6x1 sequence, on 65 nm process in the 775-land lga package supporting hyper-threading technology and 64 arhitecture
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Land Listing and Signal Descriptions
Table 24.Numerical Land Assignment
Land
Land Name
#
C15
C16
C17
C18
C19
C2
C20
C21
C22
C23
VCCIOPLL
C24
C25
C26
C27
C28
C29
C3
C30
C4
C5
C6
C7
C8
DSTBN0#
C9
RESERVED
D1
RESERVED
D10
D11
D12
D13
D14
RESERVED
D15
D16
RESERVED
D17
D18
D19
D2
D20
D21
D22
D23
Datasheet
Signal Buffer
Type
D51#
Source Synch Input/Output
VSS
Power/Other
DSTBP3#
Source Synch Input/Output
D54#
Source Synch Input/Output
VSS
Power/Other
BNR#
Common Clock Input/Output
DBI3#
Source Synch Input/Output
D58#
Source Synch Input/Output
VSS
Power/Other
Power/Other
VSS
Power/Other
VTT
Power/Other
VTT
Power/Other
VTT
Power/Other
VTT
Power/Other
VTT
Power/Other
LOCK#
Common Clock Input/Output
VTT
Power/Other
VSS
Power/Other
D01#
Source Synch Input/Output
D03#
Source Synch Input/Output
VSS
Power/Other
Source Synch Input/Output
D22#
Source Synch Input/Output
D15#
Source Synch Input/Output
VSS
Power/Other
D25#
Source Synch Input/Output
VSS
Power/Other
D49#
Source Synch Input/Output
VSS
Power/Other
DBI2#
Source Synch Input/Output
ADS#
Common Clock Input/Output
D48#
Source Synch Input/Output
VSS
Power/Other
D46#
Source Synch Input/Output
FC9
Power/Other
Table 24.Numerical Land Assignment
Land
Direction
Land Name
#
D24
VSS
D25
D26
D27
D28
D29
D3
VSS
D30
D4
HIT#
D5
VSS
D6
VSS
D7
D20#
D8
D12#
D9
VSS
E10
D21#
E11
VSS
E12
DSTBP1#
E13
D26#
E14
VSS
E15
D33#
E16
D34#
E17
VSS
E18
D39#
E19
D40#
E2
VSS
E20
VSS
E21
D42#
E22
D45#
E23
RESERVED
E24
FC10
E25
VSS
E26
VSS
E27
VSS
E28
VSS
E29
VSS
E3
TRDY#
E4
HITM#
E5
FC20
E6
RESERVED
Output
E7
RESERVED
Signal Buffer
Direction
Type
Power/Other
VTT
Power/Other
VTT
Power/Other
VTT
Power/Other
VTT
Power/Other
VTT
Power/Other
Power/Other
VTT
Power/Other
Common Clock Input/Output
Power/Other
Power/Other
Source Synch Input/Output
Source Synch Input/Output
Power/Other
Source Synch Input/Output
Power/Other
Source Synch Input/Output
Source Synch Input/Output
Power/Other
Source Synch Input/Output
Source Synch Input/Output
Power/Other
Source Synch Input/Output
Source Synch Input/Output
Power/Other
Power/Other
Source Synch Input/Output
Source Synch Input/Output
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Common Clock
Common Clock Input/Output
Power/Other
Output
Input
Output
59

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