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3-4. INTERRUPTS
MPU-7 interrupts use levels 1 to 7.
The correspondence
between devices and interrupt levels is given below.
Level 7
FDC (DREQ in DMA mode)
Level 6
Timer interrupt ClOOHz interrupt)
Level 5
SCC (internal and external)
*
Keyboard/mouse data receive interrupts
Level 4
LANCE (Am7990 INT)
SCSI (CXD1180 IRQ)
SLOTINT3 (expansion slot IPIRQ3)
Level 3
FDC CuPD72067G INT)
SLOTINTl (expansion slot IPIRQl)
Level 2
!NTH (based on CDECR internal control register)
Level 1
Async trap (based on CDECR external control
register)
*
The external SCSI interrupt is connected to IPIRQS on the
MB-5 board.
Only interrupts from external and internal
sec
are vector
interrupts CVECT is output).
All the others are auto vector
interrupts (AVEC is output).
If two interrupts at the same
level are received simultaneously, the causes of the
interrupts are determined using an INTOSTAT register readout
and the appropriate service routines are called.
A flowchart for auto vector interrupts is given below.
NVVS-1510/1530/1580
~29
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