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3-3-6.
LANCE, LANCE-Buffer Access
LANCE and the LANCE-buff er are accessed using a chip select
signal output by PARK.
DSACK, however, is output directly
from a LANCE-use gate array (WSC-LANCE).
WSC-LANCE controls
the buffers by performing arbitration when the CPU and LANCE
access buffers.
It performs switching between when the CPU
accesses LANCE and when it accesses a buffer.
CPU
CPU to LANCE Access
wsc
~-----1
LANCE t--------tAm7990
4
CPU to Buff er
+
Access
Buffer
~CE
to
Buffer Access
a) LANCE access by the CPU
<CPU>
CXK5864
LANCE address output
R/W =output
FCO - 2 output
SIZO, 1 = output
AS= DS = "L"
<MEMC>
PORT output
< CDECR >
~------'-..
IOSEL output
<PARK>
< WSC - LANCE >
~----<-.
LANCE output
IOA1
Data read/write
Bus arbitration/
L..------1~
Buffer enabled/
LCSX, etc. output
<LANCE>
--
-
- - -
-
-- -- -
- -
-
-
-
- - - - - - -
-
-
-
- - -
-
- - - - -
-
-
- - - - - - - -
-
- -
-
-
-
- -
-
-
-
- - - - -
-
- - - - -
-
- - - -
-
--
-
-
-
- - - - -
- - -
-
-
-
-
- -
--
--
----
DSACKL output
DSACKO
AS= DS = "H"
PORT negated
1-------~
LANCE negated
I
'-------• IOSEL negated
----~·-!
DSACKL negated
I
3-14
N\IVS-1510/1530/1580
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