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CPD
CPU
1180 Access by CPU
~
1---+--+------+
MD
110
Access
by
CPU
(*2)
MEMORY
Other
110
Data Transfer
by DMAC (*1)
SCSI
Bus
* 1 and *2 can be occured at same time
Therefore, when the CPU needs to access CXD1180, usage
arbitration circuit built into DMAC must give it
authorization first.
A flowchart of this process is given
below.
<CPU>
SCSI address output
R/W =output
FCO - 2 output
SIZO, 1 = output
AS= DS = "L"
<MEMC>
PORT output
< CDECR >
IOSEL output
<PARK>
< WSC - ICKDAMAC >
.____ _ _ SCSIREO output
1180 usage arbitration/
.__ _ _ _ .__... Buffer enable/
IOAO, 1, 2
Data read/write
SCSICS output/
IOBSEL output/
IORD/WR output
~
-
- - - -
-
-
-
- -
- - - - -
- - - -
-
-
-
- -
- -
-
-
- - -
- - - - -
-
- - -
- -
- - -
-
- -
- - -
-
-
- - - - - - -
- - -
- -
- - - - -
-
- - - - -
_.,...
DSACKO
3-16
DSACK I
0
out ut
SCSIACK output
<
1180
>
Access acceoted
NWS-1510/1530/1580
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