Agilent Technologies 85110L User's And Service Manual page 80

Table 7-1 Test Sets Interconnect Table (1 of 6)
Mnemonic Description
ACTIVE Active LED Indicator
AB0 Address bus Bit 0
AB1 Address Bus Bit 1
AB2 Address Bus Bit 2
AB3 Address Bus Bit 3
AB4 Address Bus Bit 4
A1S1I Attenuator 1 Section 1 In
A1S10 Attenuator 1 Section 1 Out
A1S2I Attenuator 1 Section 2 In
A1S2O Attenuator 1 Section 2 Out
A1S3I Attenuator 1 Section 3 In
A1S3O Attenuator 1 Section 3 Out
A1S4l Attenuator 1 Section 4 In
A1S4O Attenuator 1 Section 4 Out
A2S1I Attenuator 2 Section 1 In
A2S1O Attenuator 2 Section 1 Out
A2S2l Attenuator 2 Section 2 In
A2S2O Attenuator 2 Section 2 Out
A2S3I Attenuator 2 Section 3 In
A2S3O Attenuator 2 Section 3 Out
A2S4l Attenuator 2 Section 4 In
A2S4O Attenuator 2 Section 4 Out
BNMINT Buffered Non-Maskable Interrupt
BSRQ Buffered Service Request
DB0 Data Bus Bit 0
DB1 Data Bus Bit 1
DB2 Data Bus Bit 2
DB3 Data Bus Bit 3
DB4 Data Bus Bit 4
DB5 Data Bus Bit 5
DB6 Data Bus Bit 6
DB7 Data Bus Bit 7
GND Chassis Ground
LAP1 Low=Port 1 Attn Present
LAP2 Low=Port 2 Attn Present
LATDRV V P Low=Atten Sw/DrvrPresent
Agilent 85110L Test Set
Signal Enters
(Assembly)⇒
Signal Enters Signal Exits
Motherboard Motherboard
(Connector/Pin) (Connector)⇒
XA4−3
XA4−29
XA4−8
XA4−30
XA4−9
XA4−31
XA5−4
XA5−26
XA5−24
XA5−3
XA5−23
XA5−2
XA5−25
XA5−1
XA5−44
XA5−22
XA45−18
XA5−42
XA5−40
XA5−20
XA5−19
XA5−41
XA4−28
XA4−2
XA4−15
XA4−37
XA4−16
XA4−38
XA4−17
XA4−39
XA4−18
XA4−40
XA4−15−23, 40−44
J8−1
J9−1
XA5−43
A1 Front A2 IF Multiplexer A3 VTO
Panel Summing Amp
J1 XA2
4
29
8
30
9
31
4
28 28
15
37
16
38
17
39 39
18
40
3, 5 11, 12, 33, 34 11, 12, 33, 34
Service
Introduction
A4 GPIB
XA3 XA4
29
8
30
9
31
2
15
37
16
38
17
18
40
11, 12, 33, 34
19
41
44
7-3