B.3 Status Register Conventions - Texas Instruments TMS320C55 Series Reference Manual

Status Register Conventions
B.3 Status Register Conventions
Register
ST0
ST1
B-4
The status registers (ST0-ST2) are automatically preserved by hardware
during interrupt processing such that upon return from an HWI, these
status registers are returned to the state they were in prior to the interrupt.
ST3 bits are generally propagated except as shown below.
At system boot time and prior to entering an HWI thread handled by the
DSP/BIOS HWI dispatcher or coded using HWI_enter/HWI_exit, some
status bits are configured by DSP/BIOS in order to establish a C-
compatible and DSP/BIOS-compatible runtime context for DSP/BIOS
functions and HWIs. These settings are consistent with those presumed
by the C/C++ compiler.
The following definitions describe the various possible status register bit
handling behaviors:
❏ X - Untouched. DSP/BIOS does not manipulate these bits nor
depend on their values.
❏ B-n - BIOS. DSP/BIOS sets the bit(s) to the value n at boot time and
before entering a HWI that uses the HWI dispatcher or
HWI_enter/HWI_exit. Proper operation of DSP/BIOS is not
guaranteed if an application changes these status bit settings.
❏ P - Propagated. These bits are not restored upon returning from an
interrupt or task context switch. Instead, they are propagated through
all context switches. (That is, once they are changed, they remain
changed through all contexts.)
Table 2–13 Status Bit Handling
Status Bit Status Bit Name
AC0V2 AC2 overflow flag
AC0V3 AC3 overflow flag
TC1 Test/control flag 1
TC2 Test/control flag 2
CARRY Carry Bit
AC0V0 AC0 overflow flag
AC0V1 AC1 overflow flag
BRAF Block-repeat active flag
CPL Compiler mode
Type Notes
X Restored after int
X Restored after int
X Restored after int
X Restored after int
X Restored after int
X Restored after int
X Restored after int
X Restored after int
B-1 Restored after int