Internal Oscillator Control Functional Block; Output Control Functional Block; U25 Drive Register 2 Bit Description (Write @ $D0X21) - Fluke 9100 Series Service Manual

2/Theory of Operation

Internal Oscillator Control Functional Block

The Vector Output I/O Module contains a 1, 5, 10, and 20MHz internal
clock source that is available for vector driving. The desired clock can
be selected by writing to Drive Register 2 (U25) of the Main PCA
($DOX21) and specifying bits 1 and 0.
The Internal Oscillator Control Functional Block consists of a 20 MHz
Oscillator (U20), a 70HCT390 Dual Decade Ripple Counter (U21), a 74HC74
D-Type Flip-Flop (U28), and a 74AC151 8-Input Multiplexer (U22), all
located on the Main PCA.
Writing to U25 ($DOX21) using bit 1 and bit 0 selects the frequency of
the internal clock. Outputs BMUX1 and BMUX0 from U25 to U22 control the
selection of one of four clocks (see Table 2-7). These clocks are 20 MHz
(obtained directly from the 20 MHz Oscillator U20), 10 MHz (obtained
from U21 by dividing the 20 MHz clock by two), 5 MHz (obtained by
dividing the 10 MHz clock by two using U28), and 1 MHz (obtained by
dividing the 10 MHz clock by ten using U21). The Y output of U22 pin 5
goes directly to the Top PCA and is used by the SSLOGIC Functional Block
as one vector driving clock source. The Y- output from U22 pin 6 is
inverted by U19. This inversion gives OSC-CLK the same phase as the
INT-OSC output and delays it slightly to reduce the clock to vector-out
skew before being routed to the P1 pin 5 INT OSC output.
Table 2-7.
___________________________________________________________________________
BIT
___________________________________________________________________________
7,6,5,4
3
2
1
0
___________________________________________________________________________
*BMUX1
___________________________________________________________________________
0
0
1
1
___________________________________________________________________________

Output Control Functional Block

The U10 PAL provides the majority of the output section control. It
provides the latching signals COMMAND0- and COMMAND1- to U5 and U6. It
provides the RAM-PORT- signal that controls the chip counter U9 and the
RAM Select U11 PAL. It decodes writes to $D0X51 to generate RAM-STROBE,
which provides the soft-clocking ability for vector output. It supplies

U25 Drive Register 2 Bit Description (Write @ $D0X21)

SIGNAL
----
LCHI-/LCLO-
LTCCLR-
BMUX1*
BMUX0*
*BMUX0 FREQUENCY
0 10 MHz
1 20 MHz
0 5 MHz
1 1 MHz
1
---- ----
LCHI- LCLO-
NO LTCCLR- LTCCLR-
2-20
0