Custom Chip Functional Block; Address Decoding Example - Fluke 9100 Series Service Manual

Vector output i/o module
Hide thumbs Also See for 9100 Series:
Table of Contents

Advertisement

2/Theory of Operation
low. U6 decodes the latched address lines and sets output line AD8- low.
The logic low on AD8- is gated through U5 and sets up a logic low on
CS0-, thereby enabling custom chip U100. To select custom chip U100 on
Module 3, the address $D0481 is used.
A custom chip may be addressed individually, or all custom chips may be
addressed simultaneously. Address bits A4 through A7 determine the
custom chip selection. To address all chips, an address in the form
$DXXFX must be used (X means don't care). This address causes the
ALLCHIP- signal (U6-7) to go active, which when gated through U5 and U3,
makes all five chip selects CS0- through CS4- active.

Custom Chip Functional Block

The custom chips each contain eight channels of data acquisition. Each
channel performs 16-bit Cyclic Redundancy Checking (CRC), 23-bit (with
overflow) transition counting, 3-bit asynchronous level history
recording, 3-bit synchronous level history recording, and 1-bit data
comparison. The custom chips are used for module control, and are
Figure 2-4. Address Decoding Example
2-8

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

9100a-017

Table of Contents