Adc_Dma_Mode_En Register - Texas Instruments CC3200 Technical Reference Manual

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13.4.1.10 ADC_DMA_MODE_EN Register (offset = 64h) [reset = 0h]
ADC_DMA_MODE_EN is shown in
31 30 29 28
15 14 13 12
RESERVED
Bit Field
31-8 RESERVED
7-0 DMA_MODEENABLE
SWRU367D – June 2014 – Revised May 2018
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Figure 13-12
Figure 13-12. ADC_DMA_MODE_EN Register
27 26 25
11 10 9
R-0h
Table 13-12. ADC_DMA_MODE_EN Register Field Descriptions
Type Reset
R 0h
R/W 0h
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and described in Table
24 23 22 21
RESERVED
R-0h
8 7 6 5
DMA_MODEENABLE
Description
This register enables DMA mode.
Bit 0: channel 0 DMA mode enable.
Bit 1: Reserved for internal channel
Bit 2: channel 2 DMA mode enable.
Bit 3: Reserved for internal channel.
Bit 4: channel 4 DMA mode enable.
Bit 5: Reserved for internal channel
Bit 6: channel 6 DMA mode enable.
Bit 7: Reserved for internal channel.
0h = Only the interrupt mode is enabled.
1h = Respective ADC channel is enabled for DMA.
ADC_MODULE Registers
13-12.
20 19 18 17
4 3 2 1
R/W-0h
Analog-to-Digital Converter [ADC]
16
0
409