Spi_Tx Register - Texas Instruments CC3200 Technical Reference Manual

SPI Registers
8.6.1.9 SPI_TX Register (offset = 138h) [reset = 0h]
SPI_TX is shown in
This register contains a single SPI word to transmit on the serial link, depending on SPI word length. See
Chapter Access to data registers for the list of supported accesses; the little endian host accesses the SPI
8-bit word on 0x00, while the big endian host accesses it on 0x03.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Bit Field
31-0 TDATA
282
SPI (Serial Peripheral Interface)
Figure 8-27 and described in
Figure 8-27. SPI_TX Register
Table 8-15. SPI_TX Register Field Descriptions
Type Reset
R/W 0h
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Table 8-15.
TDATA
R/W-0h
Description
Channel data to transmit
SWRU367D – June 2014 – Revised May 2018
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9 8 7 6 5 4 3 2
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