Www.ti.com; Gptmcfg Register - Texas Instruments CC3200 Technical Reference Manual

TIMER Registers
9.5.1.1 GPTMCFG Register (offset = 0h) [reset = 0h]
GPTMCFG is shown in
This register configures the global operation of the GPTM module. The value written to this register
determines whether the GPTM is in 32- or 16-bit mode.
NOTE: Bits in this register should only be changed when the TAEN and TBEN bits in the GPTMCTL
register are cleared.
31 30 29 28
15 14 13 12
Bit Field
31-3 RESERVED
2-0 GPTMCFG
298
General-Purpose Timers
Figure 9-5 and described in
Figure 9-5. GPTMCFG Register
27 26 25 24
RESERVED
R-0h
11 10 9 8
RESERVED
R-0h
Table 9-9. GPTMCFG Register Field Descriptions
Type Reset
R 0h
R/W 0h
Copyright © 2014–2018, Texas Instruments Incorporated
Table 9-9.
23 22 21 20
7 6 5 4
Description
GPTM Configuration The GPTMCFG values are defined as follows:
0h = For a 16/32-bit timer, this value selects the 32-bit timer
configuration.
1h-3h = Reserved
4h = For a 16/32-bit timer, this value selects the 16-bit timer
configuration. The function is controlled by bits 1:0 of GPTMTAMR
and GPTMTBMR.
5h - 7h = Reserved
SWRU367D – June 2014 – Revised May 2018

www.ti.com

19 18 17 16
3 2 1 0
GPTMCFG
R/W-0h
Submit Documentation Feedback