TMS570LS3137
SPNS162C – APRIL 2012 – REVISED APRIL 2015
8.7
Device Identification Code Register
The device identification code register identifies several aspects of the device including the silicon version.
The details of the device identification code register are shown in
register value for this device is:
•
Rev A = 0x802AAD05
•
Rev B = 0x802AAD15
•
Rev C = 0x802AAD1D
•
Rev D = 0x802AAD25
31
30
29
28
CP-15
R-1
15
14
13
12
TECH
I/O
VOLT
AGE
R-101
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
BIT
FIELD
31
CP15
30-17
UNIQUE ID
16-13
TECH
12
I/O VOLTAGE
11
PERIPHERAL
PARITY
10-9
FLASH ECC
8
RAM ECC
7-3
REVISION
2-0
101
160
Device and Documentation Support
Figure 8-2. Device ID Bit Allocation Register
27
26
25
24
UNIQUE ID
R-00000000010101
11
10
9
PERIPH
FLASH ECC
RAM
PARITY
ECC
R-1
R-10
R-1
Table 8-1. Device ID Bit Allocation Register Field Descriptions
VALUE
Indicates the presence of coprocessor 15
1
CP15 present
10101
Silicon version (revision) bits.
This bit field holds a unique number for a dedicated device configuration (die).
Process technology on which the device is manufactured.
0101
F021
I/O voltage of the device.
0
I/O are 3.3 V
Peripheral Parity
1
Parity on peripheral memories
Flash ECC
10
Program memory with ECC
Indicates if RAM memory ECC is present.
1
ECC implemented
Revision of the device.
The platform family ID is always 0b101
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Table
8-1. The device identification code
23
22
21
8
7
6
5
VERSION
R-00000
DESCRIPTION
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20
19
18
17
4
3
2
1
1
0
R-1
R-0
16
TECH
R-0
0
1
R-1