Siemens SIMATIC ET 200S Operating Instructions Manual page 243

Parameters
Latch: Encoder value
Comparator 1
Comparator 2
Sign of life
Encoder sampling rate
See the technical specifications of the absolute encoder.
1
The monoflop time is the time between 2 SSI frames. The assigned monoflop time must be greater than the monoflop
2
time of the absolute encoder (refer to the technical specifications of the manufacturer).
The following limitation applies to the monoflop time of the absolute encoder:
3
(1/transmission rate) < monoflop time of absolute encoder < 64 µs
Technological Functions
Operating Instructions, 02/2007, A5E00124867-05
Value Range
Not active / With rising edge DI / With
falling edge DI / With both edges DI
Not active / In the up direction / In the
down direction / In both directions
Not active / In the up direction / In the
down direction / In both directions
Off, On
No limitation, 0.1 kHz to 6.3 kHz
(in 0.1-kHz steps)
4.8 Setting parameters for the 1SSI
Note
This parameter is available in the parameter
assignment software in standard mode only.
Not active: The encoder value cannot be frozen.
This parameter is available in the parameter
assignment software in standard mode only.
Not active: The comparator is switched off.
This parameter is available in the parameter
assignment software in standard mode only.
Not active: The comparator is switched off.
This parameter is only active in isochrone mode.
When sign of life is on, the sign-of-life bit is toggled,
i.e., the last sent value is inverted, each time an
encoder value is read in in isochrone mode. If a
reduction is assigned in the "Encoder Sampling
Rate" parameter, the value is toggled only if an
encoder value was actually read in.
You can find the sign-of-life bit in the feedback
interface in:
Byte 4/bit 7 (standard mode)
•
Byte 0/bit 7 (fast mode)
•
Any encoder sampling rate to be taken into account
is set here. This parameter is only active in
isochrone mode. It enables the use of slower
encoders (such as ultrasound encoders) even in a
fast processing cycle. An integer reduction n is
calculated using the set frequency. In this case, the
encoder is read in again only every nth clock cycle.
Example: Processing cycle 500 µs
Encoder sampling rate: 1.2 KHz (approximately
every 833 µs)
--> reduction n = 2, i.e., the encoder is read in again
only every 2nd processing cycle, i.e., every ms.
1SSI
243