Sony BVW-55 Maintenance Manual page 607

SW
MULTI
11 - 17,
10 V
PB DATA DATA
19 - 21
09 - 00
SHIFT
SEP
V SHIFT
22 SEP.
PB HD
T. G.
24 24 1
PB CF
23
P. C.
PB VD
25
PB PARITY
187
DD SCK
SERIAL
MODE
186
DD START TO
GEN.
188
PARALLEL
MODE DATA
MODE
190
ADD CHECK
PARALLEL
189
STSDATA TO
SERIAL
194
CK27
1
T. G.
HEF HD
2
A
REF VD
3 3
DEC
REF CF
163 4 DREF CF/VD
PAL/NTSC
DEC
PB HD
156 - 159 4
REF HD
ICADDR 0 - 3
136 - 138 3
CADDR 0 - 2
167
TSEL 4
DLY
9
POWER ON
RESET
*
179
PFILON
2
140, 153
ROMSEL 0, 1
180
PANABLK
BVW-55
WRADDR RDADDR
WCK 4FSC
28
184 27
WCK 4 fsc
*
DELAY
D. F. & RATE CONV
CHROMA
H
FILTER
SHIFT
SYNC BURST
ROM ROM
Address
BF, BLK1
R. C. F PULS
27 MHz 8 fsc
SYSTEM SYSTEM
CK27
CK 4 fsc
CK13.5
CK6.75
DELAY su R. C. F
R.C.F
RATE CONV
3 DPB CF
T. G.
B
8 fsc
T. G.
C
161 162
F4HD
CK8FSC
VISC MUTE
Y
VISC COMPONENT
SW
MUTE LEVEL CONV
R-Y PEDESTAL OUT BLK
COEFFI
B-Y
COMPOSITE
SW
LEVEL CONV
SYNC
FORM
TAKE SYNC BURST BLK
COMPOSITE
SW
LEVEL CONV
LALT
B. F
FORM
CONF I
Address
R
T. G.
D CONF I
Address
B
BURST BLK
BURST COMPONENT
BLK LEVEL CONV
for CXD8382BQ
V SHIFT
49
37 - 40,
10 42 - 47
SW &
54
REF CF
SW ROUND
55
56
12 10
53
50
+
76 - 80,
10 86 - 90
12 10
141 - 148,
10 151, 152
BLK
BLK PLS
12 10
58 - 61,
VISC 10 63 - 68
12 10
GATE
VISC GATE
92 - 94,
10 96 - 104
108 - 115,
10 117, 118
12 10
121 - 126,
10
129 - 132
74
70
71
3
173 - 175
176 - 178
3
133
154
155
* CXD9008Q ONLY
IC
D1 HD
DDATA
9 - 0
DDCF 0
DPRITY
D2SYNC
DDCF 1
DDCF 2
CMPSTE
0 - 9
BBRST
0 - 9
VISC
0 - 9
CMPNTY
0 - 9
CMPNTR
0 - 9
CMPNTB
0 - 9
CK 4FSC
HSHIFT
VSHIFT
DREF CF 0 - 2
DPB CF 0 - 2
CLAMP P
FAIHE
H. M. MUTE
2-57