Sony BVW-55 Maintenance Manual page 633

TC74VHC393FT(EL) (TOSHIBA)
C-MOS DUAL 4-BIT BINARY COUNTER
—TOP VIEW—
CK
V
1 1 DD 14
1
CK
1RD 2 13 2
RD
2
1QA 3 12 2RD
1QB 4 11 2QA
13
1QC 5 10 2QB
RD
12
1QD 6 9 2QC
7 8 2QD
GND
QA QB QC QD
3 (11) 4 (10) 5 (9) 6
Q Q Q Q
1 (13)
CK
RD RD RD RD
2 (12)
RD
TC74VHC573FT(EL) (TOSHIBA)
C-MOS 3-STATE OUTPUTS OCTAL LATCHES
—TOP VIEW—
2
D1
OE
1 V 20
IN DD 3
D2
4
D3
2 19
D1 Q1 5
IN OUT
D4
6
D5
D2 3 18 Q2
IN OUT 7
D6
8
D7
D3 4 17 Q3
IN OUT 9
D8
11
5 16
D4 Q4
IN OUT
D5 6 15 Q5
IN OUT
D6 7 14 Q6
IN OUT
D7 8 13 Q7
IN OUT
D8 9 12 Q8
IN OUT
11
CK
10 11 CK
IN
GND
1
OE
TC74VHC74FT(EL) (TOSHIBA)
C-MOS DUAL D-TYPE FLIP-FLOPS WITH DIRECT SET/RESET
—TOP VIEW—
14 13 12 11 10 9 8
V
DD
Q Q
S R
D D
D
Q Q
S R
D D
D
GND
1 2 3 4 5 6 7
4
10
S
2 D 5 12 S 9
D
D Q
D Q
3 11
6
8
Q Q
R
D R
D
1
13
BVW-55
3
COUNT SEQUENCE
QA
4
QD QC QB QA
QB COUNT
5
0 0 0 0 0
QC
6
1 0 0 0 1
QD
2 0 0 1 0
3 0 0 1 1
11 4 0 1 0 0
QA
10 5 0 1 0 1
QB
9 6 0 1 1 0
QC
8 7 0 1 1 1
QD
8 1 0 0 0
9
1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
RESET/COUNT FUNCTION
(8)
RD QD QC QB QA
1 0 0 0 0
0 COUNT
0 : LOW LEVEL
1 : HIGH LEVEL
INPUT OUT
19
Q1
OE CK D Q
18
Q2
17 0 1 1 1
Q3
0 0 0
1
16
Q4
0 0 x Qo
15
Q5
x x
1 HI-Z
14
Q6
13
0 : LOW LEVEL
Q7
12
1 : HIGH LEVEL
Q8
x : DON'T CARE
OE
HI-Z : HIGH IMPEDANCE
Qo : NO CHANGE
1
D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 D8
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
D Q D Q
OE OE
INPUTS OUTPUTS
S D Qn+1 Qn+1
D R CK
D
0 1 x x 1 0
1 x 0 1
0 x
0 0 x x 1 1
1 1
1 1 0
1 1 0 0 1
x
1 1 0 Qn Qn
0 : LOW LEVEL
1 : HIGH LEVEL
x : DON'T CARE
TC7S00FU(TE85R) (TOSHIBA)
TC7SH00FU-TE85R (TOSHIBA)
C-MOS 2-INPUT NAND GATE
—TOP VIEW—
2
1 5 V
DD A
1
B
2
GND 3 4
Y = A • B =
A B
0 0
0 1
1 0
1 1
TC7S86FU (TOSHIBA)
TC7S86FU(TE85R)
TC7SH86FU-TE85R (TOSHIBA)
C-MOS 2-INPUT EXCLUSIVE OR GATE
—TOP VIEW—
2
1 5 V
DD A
1
B
2
GND 3 4
A
Y = • B + A •
A B Y
0 0 0
0 1 1
1 0 1
1 1 0
TC7W00FU (TOSHIBA)
TC7W00FU(TE12R)
C-MOS DUAL 2-INPUT NAND GATE
—TOP VIEW—
1
Q8 1 8 V A
DD
2
B
2 7
6
3
5
GND 4 5 6
Y = A • B =
A
0
0
1
1
TC7W02F (TOSHIBA)
TC7W02FU(TE12R)
C-MOS DUAL 2-INPUT NOR GATE
—TOP VIEW—
1
1
8 V A
DD
2
B
2 7
5
3 6
6
GND 4 5
Y = A • B =
A
0
0
1
1
A
4
Y = Y
B
A B
+
Y
1
1
1
0 : LOW LEVEL
0
1 : HIGH LEVEL
4
Y
B
0 : LOW LEVEL
1 : HIGH LEVEL
A
7 Y =
Y
B
3
A B
+
B Y
0 1
1 1
0 1
0 : LOW LEVEL
1 0
1 : HIGH LEVEL
A
7
Y = Y
B
3
A B
+
B Y
0 1
1 0
0 0
0 : LOW LEVEL
1 0
1 : HIGH LEVEL
IC
2-83