Sony BVW-55 Maintenance Manual page 620

IC
MB8421-90LPFQ (FUJITSU)(ACCESS TIME=90 nS)
C-MOS 16,384 (2 K x 8)-BIT DUAL PORT SRAM
—TOP VIEW—
1
NC
2
3
4
5
6
7
8
9
10
11
12
13
NC
14
NC
15
NC
16
17
18
19
A0L - A10L, A0R - A10R : ADDRESS INPUTS
I/O0L - I/O7L, I/O0R - I/O7R : DATA INPUTS/OUTPUTS
CSL CSR
, : CHIP SELECT INPUT
WEL WER
, : WRITE ENABLE INPUT
OEL OER
, : OUTPUT ENABLE INPUT
BUSYL BUSYR
, : BUSY OUTPUT
INTL INTR
, : INTERRUPT OUTPUT
60
WEL
59
CSL
2
OEL
A0L
|
DECODER
A10L
MEMORY
A0R
|
DECODER
A10R
55
WER
56
CSR
49
OER
2-70
51
NC
NC 50
49
48
47
46
45
44
43
42
GND
41
40
39
NC 38
37
NC
NC 36
35
34
33
61
BUSYL
62
INTL
MATRIX I/O I/O 0L
|
BUFFER
I/O 7L
ARRAY
MATRIX I/O I/O 0R
|
BUFFER
I/O 7R
54
BUSYR
53
INTR
MB88E346PFV-G-BND-ER (FUJITSU)
C-MOS A/D CONVERTER
—TOP VIEW—
20
AO1 1 24
V
SS
19
AO2 2 GND 23
16
15
AO3 3 22 EA1
18
AO4 4 21 EA0
21
22
AO5 5 20 DI
AO6 6 19 CLK
CS
AO7 7 18 /LD
AO8 8 17 DO
AO9 9 16 ECL
15 SEL
AO10 10
AO11 11 V 14
CC
AO12 12 V 13
DD
INPUT OUTPUT
CLK : SHIFT CLOCK A01 - 12 : A/D
CS
/LD : CHIP SELECT/LOAD DO : DATA
DI : DATA
EA0 - 1 : EEPROM ADDRESS
ECL : FOR CHECK
SEL : DATA SELECT
20
DI
16 (14)-BIT SHIFT REGISTOR
19
CLK
16
ECL (A1) (A0) CL WR D11 D10 D9 D8 D7
15
CONTROL LOGIC
SEL
18
CS
/LD (A1) (A0)
CH1 - CH12
12
DC-DC
CONV
22
CHANNEL/ADDRESS
EA1
DECODER,
21
CHARGE PUMP
EA0
12
CH12
8
CH1
8-BIT
LATCH
8
8-BIT R-2R
D/A CONV
+
_
1 2
17
DI DO
1
CLK AO1
2
AO2
3
ECL AO3
4
SEL AO4
5
CS
/LD AO5
6
AO6
7
EA0 AO7
8
AO8
EA1
9
AO9
10
AO10
11
AO11
12
AO12
V V
SS DD
24 13
17
DO
D6 D5 D4 D3 D2 D1 D0
D0 - D7
8
8
WRITE
CHARGE
12 PUMP
8
EEPROM
CELL
4
12 x 4 x 8
8
READ
12
SENSE AMP
8
8
8-BIT
LATCH
8
13
V
8-BIT R-2R DD
24
D/A CONV
V
SS
+
_
3 4 5 6 7 8 9 10 11 12
BVW-55