Special Memory Byte Smb31 And Special Memory Word Smw32; Smb34 And Smb35: Time Interval Registers For Timed Interrupts; Special Memory Bytes Smb34 And Smb35 - Siemens SIMATIC S7-200 System Manual

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Special Memory (SM) Bits
As described in Table C-12, SMB31 defines the size of the data to be saved to
permanent memory and also provides the command that initiates the execution of
a save operation. SMW32 stores the starting address in V memory for the data to
be saved to permanent memory.
Table C-12 Special Memory Byte SMB31 and Special Memory Word SMW32
SM Byte
Format
SM31.0
and
SM31.1
SM31.7
SMW32

SMB34 and SMB35: Time Interval Registers for Timed Interrupts

As described in Table C-13, SMB34 specifies the time interval for timed interrupt 0,
and SMB35 specifies the time interval for timed interrupt 1. You can specify the
time interval (in 1-ms increments) from 1 ms to 255 ms. The time-interval value is
captured by the CPU at the time the corresponding timed interrupt event is
attached to an interrupt routine. To change the time interval, you must reattach the
timed interrupt event to the same or to a different interrupt routine. You can
terminate the timed interrupt event by detaching the event.
Table C-13 Special Memory Bytes SMB34 and SMB35
SM Byte
SMB34
SMB35
C-8
MSB
SMB31:
7
Software
command
c
0 0
MSB
SMW32:
15
V memory
address
ss:
Size of the value to be saved
00 = byte
01 = byte
10 = word
11 = double word
c:
Save to permanent memory (EEPROM)
0 = No request for a save operation to be performed
1 = User program requests that the CPU save data to permanent
memory.
The CPU resets this bit after each save operation.
The V memory address for the data to be saved is stored in SMW32. This
value is entered as an offset from V0. When a save operation is executed, the
value in this V memory address is saved to the corresponding V memory
location in the permanent memory (EEPROM).
This byte specifies the time interval (in 1-ms increments from 1 ms to
255 ms) for timed interrupt 0.
This byte specifies the time interval (in 1-ms increments from 1 ms to
255 ms) for timed interrupt 1.
Description
LSB
0
0 0 0
s
s
V memory address
Description
S7-200 Programmable Controller System Manual
LSB
0
A5E00066097-02

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