Understanding The Shift Register Bit Instruction; Shift Register Entry And Exit For Plus And Minus Shifts - Siemens SIMATIC S7-200 System Manual

SIMATIC Instructions

Understanding the Shift Register Bit Instruction

The Shift Register Bit instruction provides an easy method for sequencing and
controlling product flow or data. Use the Shift Register Bit instruction to shift the
entire register one bit, once per scan. The Shift Register Bit instruction is defined
by both the least significant bit (S_BIT) and the number of bits specified by the
length (N). Figure 9-41 shows an example of the Shift Register Bit instruction.
The address of the most significant bit of the Shift Register (MSB.b) can be
computed by the following equation:
MSB.b = [(Byte of S_BIT) + ([N] - 1 + (bit of S_BIT)) / 8] [remainder of the division
by 8]
You must subtract 1 bit because S_BIT is one of the bits of the Shift Register.
For example, if S_BIT is V33.4, and N is 14, then the MSB.b is V35.1, or:
MSB.b = V33 + ([14] - 1 +4)/8
= V33 + 17/8
= V33 + 2 with a remainder of 1
= V35.1
On a Shift Minus, indicated by a negative value of length (N), the input data shifts
into the most significant bit of the Shift Register, and shifts out of the least
significant bit (S_BIT).
On a Shift Plus, indicated by a positive value of length (N), the input data (DATA)
shifts into the least significant bit of the Shift Register, specified by the S_BIT, and
out of the most significant bit of the Shift Register.
The data shifted out is then placed in the overflow memory bit (SM1.1). The
maximum length of the shift register is 64 bits, positive or negative. Figure 9-40
shows bit shifting for negative and positive values of N.
Shift Minus, Length = -14
MSB
V33 7
V34 7
V35 7
Figure 9-40
9-128
S_BIT
LSB
4 0
0
1 0
MSB of Shift Register

Shift Register Entry and Exit for Plus and Minus Shifts

Shift Plus, Length = 14
S_BIT
MSB
V33 7 4
V34 7
V35 7
MSB of Shift Register
S7-200 Programmable Controller System Manual
LSB
0
0
1 0
A5E00066097-02