Example Of An Arithmetic Logic Unit's Mode Of Operation; Accumulator Design; Retentive And Non-Retentive Operands - Siemens S5-100U User Manual

S5-100U
Table 2-1 gives information about the number and retentive characteristics (the internal memory
contents are retained/are not retained) of these timers, counters, and flags.
Operand
CPU 100 to 103
Flags
Counters
Timers
Arithmetic Unit
The arithmetic unit (ALU) consists of two accumulators, ACCU 1 and 2. The accumulators can
process byte and word operations.
Load
information
from the PII.
Figure 2-3. Example of an Arithmetic Logic Unit's Mode of Operation

Accumulator Design

ACCU 2
15 8 7
High byte Low byte
Processor
According to the control program, the processor calls statements in the program memory in
sequence and executes them. It processes the information from the PII and takes into consideration
the values of internal timers and counters as well as the signal states of internal flags.
External I/O Bus
The I/O bus is the electrical connection for all signals that are exchanged between the CPU and the
S5-100U modules in a programmable controller.
EWA 4NEB 812 6120-02
Table 2-1. Retentive and Non-Retentive Operands
Retentive
0.0 to 63.7 64.0 to 127.7
0 to 7
Process
information
in ACCU 1 and ACCU 2.
0
Figure 2-4. Accumulator Design
Non-Retentive
CPU 100 CPU 102
64.0 to 127.7
8 to 15 8 to 31
0 to 15 0 to 31
15
High byte
Technical Description
CPU 103
64.0 to 255.7
8 to 127
0 to 127
Transfer
information
to the PIQ.
ACCU 1
0
8 7
Low byte
2-5