Pruss Memory Map; Local Instruction Space Memory Map; Local Data Space Memory Map; Subsystem Global Memory Map - Texas Instruments AM1808 Technical Reference Manual

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13.8.1 PRUSS Memory Map

13.8.1.1 Local Memory Map
The PRUSS comprises various distinct addressable regions. Externally the subsystem presents a single
64Kbyte range of addresses. The internal interconnect bus (also called switched central resource, or SCR)
of the PRUSS decodes accesses for each of the individual regions. The PRUSS memory map is
documented in Table 13-30
memory maps are implemented inside the PRUSS and are local to the components of the PRUSS.
Start Address
0x00000000
Start Address
0x00000000
0x00000200
0x00002000
0x00002200
0x00004000
0x00007000
0x00007800
0x00008000
0x00010000
(1)
Note that PRU0 accesses Data RAM0 at address 0x00000000, also PRU1 accesses Data RAM1 at address 0x00000000. Data
RAM0 is intended to be the primary data memory for PRU0 and Data RAM1 is intended to be the primary data memory for
PRU1. However for passing information between PRUs, each PRU can access the data ram of the other PRU at address
0x00002000.
13.8.1.2 Global Memory Map
The global view of the PRUSS internal memories and control ports is documented in
offset addresses of each region are implemented inside the PRUSS but the global device memory
mapping places the PRUSS slave port in the address range 0x01C30000-0x01C3FFFF. The PRU0 and
PRU1 can use either the local or global addresses to access their internal memories, but using the local
addresses will provide access time several cycles faster than using the global addresses. This is because
when accessing via the global address the access needs to be routed through the switch fabric outside
PRUSS and back in through the PRUSS slave port.
Start Address
0x01C30000
0x01C30200
0x01C32000
0x01C32200
0x01C34000
0x01C37000
0x01C37800
0x01C38000
0x01C39000
0x01C3C000
SPRUH82C – April 2013 – Revised September 2016
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(Instruction Space) and in
Table 13-30. Local Instruction Space Memory Map
End Address
0x00000FFF
Table 13-31. Local Data Space Memory Map
End Address
0x000001FF
0x00001FFF
0x000021FF
0x00003FFF
0x00006FFF
0x000077FF
0x00007FFF
0x0000FFFF
0xFFFFFFFF
Table 13-32. Subsystem Global Memory Map
End Address
0x01C301FF
0x01C31FFF
0x01C321FF
0x01C33FFF
0x01C36FFF
0x01C377FF
0x01C37FFF
0x01C38FFF
0x01C3BFFF
0x01C3CFFF
Copyright © 2013–2016, Texas Instruments Incorporated
Table 13-31 (Data Space). Note that these two
PRU0
PRU0 Instruction RAM
PRU0
(1)
Data RAM 0
Reserved
(1)
Data RAM 1
Reserved
INTC Registers
PRU0 Registers
PRU1 Registers
Reserved
Reserved
Data RAM 0
Reserved
Data RAM 1
Reserved
INTC Registers
PRU0 Registers
PRU1 Registers
PRU0 Instruction RAM
Reserved
PRU1 Instruction RAM
Programmable Real-Time Unit Subsystem (PRUSS)
Registers
PRU1
PRU1 Instruction RAM
PRU1
(1)
Data RAM 1
Reserved
(1)
Data RAM 0
Reserved
INTC Registers
PRU0 Registers
PRU1 Registers
Reserved
Reserved
Table 13-32. The
Region
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