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3.4
Memory Map Summary
Note: Read/Write accesses to illegal or reserved addresses in the memory map may cause undefined
behavior.
Start Address
End Address
0x0000 0000
0x0000 0FFF
0x0000 1000
0x01BB FFFF
0x01BC 0000
0x01BC 0FFF
0x01BC 1000
0x01BC 17FF
0x01BC 1800
0x01BC 18FF
0x01BC 1900
0x01BF FFFF
0x01C0 0000
0x01C0 7FFF
0x01C0 8000
0x01C0 83FF
0x01C0 8400
0x01C0 87FF
0x01C0 8800
0x01C0 FFFF
0x01C1 0000
0x01C1 0FFF
0x01C1 1000
0x01C1 1FFF
0x01C1 2000
0x01C1 3FFF
0x01C1 4000
0x01C1 4FFF
0x01C1 5000
0x01C1 FFFF
0x01C2 0000
0x01C2 0FFF
0x01C2 1000
0x01C2 1FFF
0x01C2 2000
0x01C2 2FFF
0x01C2 3000
0x01C2 3FFF
0x01C2 4000
0x01C3 FFFF
0x01C4 0000
0x01C4 0FFF
0x01C4 1000
0x01C4 1FFF
0x01C4 2000
0x01C4 2FFF
0x01C4 3000
0x01CF FFFF
0x01D0 0000
0x01D0 0FFF
0x01D0 1000
0x01D0 1FFF
0x01D0 2000
0x01D0 2FFF
0x01D0 3000
0x01D0 BFFF
0x01D0 C000
0x01D0 CFFF
0x01D0 D000
0x01D0 DFFF
0x01D0 E000
0x01D0 FFFF
0x01D1 0000
0x01D1 07FF
0x01D1 0800
0x01D1 0FFF
0x01D1 1000
0x01D1 17FF
0x01D1 1800
0x01D1 1FFF
0x01D1 2000
0x01DF FFFF
0x01E0 0000
0x01E0 FFFF
0x01E1 0000
0x01E1 0FFF
0x01E1 1000
0x01E1 2FFF
0x01E1 3000
0x01E1 3FFF
0x01E1 4000
0x01E1 4FFF
Copyright © 2010–2014, Texas Instruments Incorporated
Table 3-2. Device Top Level Memory Map
Size
ARM Mem Map
EDMA Mem Map
4K
4K
ARM ETB
memory
2K
ARM ETB reg
256
ARM Ice Crusher
32K
1K
1K
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
2K
2K
2K
2K
64K
4K
4K
4K
Memory Protection Unit 1 (MPU 1)
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Product Folder Links:
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
PRUSS Mem
Map
PRUSS Local
Address Space
EDMA3 CC
EDMA3 TC0
EDMA3 TC1
PSC 0
PLL Controller 0
SYSCFG0
Timer0
Timer1
I2C 0
RTC
MMC/SD 0
SPI 0
UART 0
McASP 0 Control
McASP 0 AFIFO Ctrl
McASP 0 Data
UART 1
UART 2
McBSP0
McBSP0 FIFO Ctrl
McBSP1
McBSP1 FIFO Ctrl
USB0
UHPI
LCD Controller
AM1808
AM1808
Master
LCDC Mem
Peripheral Mem
Map
Map
Device Overview
11
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