Interrupt Support; Emulation Considerations; Mpu_Bootcfg_Err Interrupt Sources - Texas Instruments AM1808 Technical Reference Manual

Sitara arm microprocessor

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5.2.8 Interrupt Support

Interrupt Events and Requests

The MPU generates two interrupts: an address error interrupt (MPU_ADDR_ERR_INT) and a protection

interrupt (MPU_PROT_ERR_INT). The MPU_ADDR_ERR_INT is generated when there is an addressing

violation due to an access to a non-existent location in the MPU register space. The

MPU_PROT_ERR_INT interrupt is generated when there is a protection violation of either in the defined

ranges or to the MPU registers.

The transfer parameters that caused the violation are saved in the MPU registers.

Interrupt Multiplexing

The interrupts from both MPUs are combined with the boot configuration module into a single interrupt

called MPU_BOOTCFG_ERR. The combined interrupt is routed to the ARM interrupt controller.

shows the interrupt sources that are combined to make MPU_BOOTCFG_ERR.

MPU1_ADDR_ERR_INT

MPU1_PROT_ERR_INT

MPU2_ADDR_ERR_INT

MPU2_PROT_ERR_INT

BOOTCFG_ADDR_ERR

BOOTCFG_PROT_ERR

Memory and MPU registers are not protected against emulation accesses.

SPRUH82C – April 2013 – Revised September 2016

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Table 5-5. MPU_BOOTCFG_ERR Interrupt Sources

MPU1 address error interrupt

MPU1 protection interrupt

MPU2 address error interrupt

MPU2 protection interrupt

Boot configuration address error

Boot configuration protection error

Memory Protection Unit (MPU)

Architecture

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