Receive Filter Low Priority Frame Threshold Register (Rxfilterlowthresh); Receive Channel N Flow Control Threshold Register (Rxnflowthresh) - Texas Instruments AM1808 Technical Reference Manual

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18.3.3.26 Receive Filter Low Priority Frame Threshold Register (RXFILTERLOWTHRESH)

The receive filter low priority frame threshold register (RXFILTERLOWTHRESH) is shown in
and described in Table
Figure 18-64. Receive Filter Low Priority Frame Threshold Register (RXFILTERLOWTHRESH)
31
15
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-63. Receive Filter Low Priority Frame Threshold Register (RXFILTERLOWTHRESH)
Bit Field
31-8 Reserved
7-0 RXFILTERTHRESH
18.3.3.27 Receive Channel Flow Control Threshold Registers (RX0FLOWTHRESH-RX7FLOWTHRESH)
The receive channel 0-7 flow control threshold register (RXnFLOWTHRESH) is shown in
described in Table
Figure 18-65. Receive Channel n Flow Control Threshold Register (RXnFLOWTHRESH)
31
15
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-64. Receive Channel n Flow Control Threshold Register (RXnFLOWTHRESH)
Bit Field
31-8 Reserved
7-0 RXnFLOWTHRESH
SPRUH82C – April 2013 – Revised September 2016
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18-63.
R-0
Field Descriptions
Value Description
0 Reserved
0-FFh Receive filter low threshold. These bits contain the free buffer count threshold value for filtering
low priority incoming frames. This field should remain 0, if no filtering is desired.
18-64.
R-0
Field Descriptions
Value Description
0 Reserved
0-FFh Receive flow threshold. These bits contain the threshold value for issuing flow control on
incoming frames for channel n (when enabled).
Copyright © 2013–2016, Texas Instruments Incorporated
Reserved
R-0
8 7
RXFILTERTHRESH
Reserved
R-0
8 7
RXnFLOWTHRESH
Registers
Figure 18-64
R/W-0
Figure 18-65
R/W-0
EMAC/MDIO Module
16
0
and
16
0
809