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MPU Registers
5.3.1 Revision Identification Register (REVID)
The revision ID register (REVID) contains the MPU revision. The REVID is shown in
described in
Table
31
LEGEND: R = Read only; -n = value after reset
Bit
Field
Value
31-0
REV
4E81 0101h
5.3.2 Configuration Register (CONFIG)
The configuration register (CONFIG) contains the configuration value of the MPU. The CONFIG is shown
in
Figure 5-4
and described in
NOTE: Although the NUM_AIDS bit defaults to 12 (Ch), not all AIDs may be supported on your
device. Unsupported AIDs should be cleared to 0 in the memory page protection attributes
registers (MPPA). See for a list of AIDs supported on your device.
31
ADDR_WIDTH
R-0
15
12
NUM_AIDS
R-Ch
LEGEND: R = Read only; -n = value after reset
(1)
For MPU1.
(2)
For MPU2.
Bit
Field
31-24
ADDR_WIDTH
23-20
NUM_FIXED
19-16
NUM_PROG
15-12
NUM_AIDS
11-1
Reserved
0
ASSUME_ALLOWED
104
Memory Protection Unit (MPU)
5-8.
Figure 5-3. Revision ID Register (REVID)
R-4E81 0101h
Table 5-8. Revision ID Register (REVID) Field Descriptions
Description
Revision ID of the MPU.
Table
5-9.
Figure 5-4. Configuration Register (CONFIG)
(1)
(2)
or 6h
11
Table 5-9. Configuration Register (CONFIG) Field Descriptions
Value
Description
0-FFh
Address alignment (2
0-Fh
Number of fixed address ranges.
0-Fh
Number of programmable address ranges.
0-Fh
Number of supported AIDs.
0
Reserved
Assume allowed. When an address is not covered by any MPU protection range, this bit
determines whether the transfer is assumed to be allowed or not allowed.
0
Assume is disallowed.
1
Assume is allowed.
Copyright © 2013–2016, Texas Instruments Incorporated
REV
24
23
NUM_FIXED
(1)
(2)
R-0
or 1
Reserved
R-0
n
KByte alignment) for range checking.
SPRUH82C – April 2013 – Revised September 2016
www.ti.com
Figure 5-3
and
20
19
NUM_PROG
(1)
(2)
R-6h
or Ch
1
0
ASSUME_ALLOWED
R-1
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