Random Cell Connection Support - Texas Instruments BQ77307 Instruction Manual

2-series to 7-series high accuracy battery primary or secondary protector for li-ion, li-polymer, lifepo4 (lfp), and lto battery packs

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8.2.4 Random Cell Connection Support

The BQ77307 device supports a random connection sequence of cells to the device during pack manufacturing.

For example, cell-6 in a 7-cell stack might be first connected at the input terminals leading to pins VC6 and

VC5, then cell-2 may next be connected at the input terminals leading to pins VC2 and VC1, and so on. It is

not necessary to connect the negative terminal of cell-1 first at VC0. As another example, consider a cell stack

that is already assembled and cells already interconnected to each other, then the stack is connected to the

PCB through a connector, which is plugged or soldered to the PCB. In this case, the sequence order in which

the connections are made to the PCB can be random in time, they do not need to be controlled in a certain

sequence.

There are some restrictions to how the cells are connected during manufacturing:

•

To avoid misunderstanding, note that the cells in a stack cannot be randomly connected to any VC pin on

the device, such as the lowest cell (cell-1) connected to VC7, while the top cell (cell-7) is connected to VC2,

and so on. It is important that the cells in the stack be connected in ascending pin order, with the lowest cell

(cell-1) connected between VC1 and VC0, the next higher voltage cell (cell-2) connected between VC2 and

VC1, and so on.

•

The random cell connection support is possible due to high voltage tolerance on pins VC1–VC7.

VC0 has a lower voltage tolerance. This is because VC0 should be connected through the series-

cell input resistor to the VSS pin on the PCB, before any cells are attached to the PCB. Thus, the

VC0 pin voltage is expected to remain close to the VSS pin voltage during cell attach. If VC0 is

not connected through the series resistor to VSS on the PCB, then cells cannot be connected in

random sequence.

•

Each of the VC1–VC7 pins includes a diode between the pin and the adjacent lower cell input pin (that is,

between VC7 and VC6, between VC6 and VC5, and so on), which is reverse biased in normal operation. This

means an upper cell input pin should not be driven to a low voltage while a lower cell input pin is driven to a

Figure 8-4. Scope Plot of SCD Event and Protection

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BQ77307

SLUSF60 – DECEMBER 2023

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