Register Description; Register Map - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM

2.3 REGISTER DESCRIPTION

2.3.1 REGISTER MAP

Register
Feed
FCINTSTAT
FCINTENSET
FCINTENCLR
FCINTPEND
FCFIFOSTAT
FCFIFOCTRL
FCBRDMAS
FCBRDMAL
FCBRDMAC
FCBTDMAS
FCBTDMAL
FCBTDMAC
FCHRDMAS
FCHRDMAL
FCHRDMAC
FCPKDMAS
FCPKDMAL
FCPKDMAC
FCPKDMAO
AES
AES_control
AES_status
Address
R/W
0xEA00_0000
R
0xEA00_0004
R/W
0xEA00_0008
R/W
0xEA00_000C
R/W
0xEA00_0010
R
0xEA00_0014
R/W
0xEA00_0020
R/W
0xEA00_0024
R/W
0xEA00_0028
R/W
0xEA00_0030
R/W
0xEA00_0034
R/W
0xEA00_0038
R/W
0xEA00_0040
R/W
0xEA00_0044
R/W
0xEA00_0048
R/W
0xEA00_0050
R/W
0xEA00_0054
R/W
0xEA00_0058
R/W
0xEA00_005C
R/W
0xEA00_4000
R/W
0xEA00_4004
R/W
Description
Specifies the interrupt status of feed control.
Specifies the interrupt enable set register of
feed control. Value '1' should be written to set
the corresponding bit.
Specifies the interrupt enable clear register of
feed control.
Value '1' should be written to clear the
corresponding bit.
Specifies the pending interrupts of feed
control.
Specifies the FIFO status of feed control.
Specifies the FIFO control of feed control.
Specifies the start address of block cipher
receiving DMA.
Specifies the length of block cipher receiving
DMA.
Specifies the control of block cipher receiving
DMA.
Specifies the start address of block cipher
transmitting DMA.
Specifies the length of block cipher
transmitting DMA.
Specifies the control of block cipher
transmitting DMA.
Specifies the start address of hash receiving
DMA.
Specifies the length of hash receiving DMA.
Specifies the control of hash receiving DMA.
Specifies the start address of PKA DMA.
Specifies the length of PKA DMA.
Specifies the control of PKA DMA.
Specifies the offset in PKA SRAM.
Specifies the AES control register.
Specifies the AES status register.
2 ADVANCED CRYPTO ENGINE
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0055
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0002
2-11

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