Register Description; Register Map - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM

2.9 REGISTER DESCRIPTION

2.9.1 REGISTER MAP

Register
Address
IISCON
0xEEE3_0000
IISMOD
0xEEE3_0004
IISFIC
0xEEE3_0008
IISPSR
0xEEE3_000C
IISTXD
0xEEE3_0010
IISRXD
0xEEE3_0014
IISFICS
0xEEE3_0018
IISTXDS
0xEEE3_001C
IISAHB
0xEEE3_0020
IISSTR0
0xEEE3_0024
IISSIZE
0xEEE3_0028
IISTRNCNT
0xEEE3_002C
IISLVL0ADDR
0xEEE3_0030
IISLVL1ADDR
0xEEE3_0034
IISLVL2ADDR
0xEEE3_0038
IISLVL3ADDR
0xEEE3_003C
IISSTR1
0xEEE3_0040
NOTE: All registers of IIS interface are accessible by word unit with STR/LDR instructions.
R/W
R/W
Specifies the IIS interface control register
R/W
Specifies the IIS interface mode register
Specifies the IIS interface primary Tx FIFO & Rx
R/W
FIFO control register
Specifies the IIS interface clock divider control
R/W
register
Specifies the IIS interface transmit primary sound
W
data register
R
Specifies the IIS interface receive data register
Specifies the IIS interface secondary TXFIFO_S
R/W
control register
W
Specifies the IIS interface secondary transmit data
register
R/W
Specifies the IIS AHB DMA control register
R/W
Specifies the IIS AHB DMA start address0 register
R/W
Specifies the IIS AHB DMA size register
R
Specifies the IIS AHB DMA transfer count register
Specifies the IIS AHA DMA Interrupt level 0
R/W
register
Specifies the IIS AHA DMA Interrupt level 1
R/W
register
Specifies the IIS AHA DMA Interrupt level 2
R/W
register
Specifies the IIS AHA DMA Interrupt level 3
R/W
register
R/W
Specifies the IIS AHB DMA start address1 register
2 IIS MULTI AUDIO INTERFACE
Description
Reset Value
0x000
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x7FFF_0000
0x0
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0
2-20

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