Advanced Crypto Engine; Overview Of Advanced Crypto Engine - Samsung S5PC110 Manual

S5PC110_UM
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ADVANCED CRYPTO ENGINE

2.1 OVERVIEW OF ADVANCED CRYPTO ENGINE

Security subsystem (SSS) represents a small system with internal buses and small security IPs that should be
attached to a chip as an IP. The security IPs in SSS can process the independent security function.
SSS comprises of the following internal components:
• AES
• DES and 3DES
• SHA-1, MD5, HMAC, and PRNG
• Public Key Accelerator (PKA)
• Feed Controller (FeedCtrl)
FeedCtrl comprises of the following components:
• Block Cipher Receiving DMA (BRDMA)
• Block Cipher Transmission DMA (BTDMA)
• Hash Receiving DMA (HRDMA)
• PKA Bi-directional DMA (PKDMA)
• FIFO and FIFO Interconnections
• Interrupt Controller
• FIFO Controller
SSS comprises of the following external interfaces:
• One bus slave port (for SFR setting)
• Four bus master ports (for DMA operations)
• Two interrupts: MA interrupt (to notify the end of DMA operations) and Hash interrupt (to notify the end of
Hash or PRNG operations)
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