System Memory Configuration - EPOX EP-58MVP3C-M Manual

2-3 System Memory Configuration

This mainboard supports different type of settings for the system memory. The
following figures and table provides all possible memory combinations.
1 2 1 2
1 2
1 2
DIMM 1
BANK 0
8MB
16MB
32MB x
64MB
1
128MB
This mainboard supports 2 kinds of powerful and flexible SDRAM frequency
selections. These can be synchronous with CPU bus clock or fixed as 66MHz. By
implementing the VCS (Virtual Clock Synchronization) technology, this
mainboard refers to the use of delay-lock-loop (DLL) to enable synchronous and
pseudo-synchronous operation of the processor and DRAM, AGP and PCI buses.
The JP5 allows user to set the SDRAM Frequency between 66/100MHz.
JP5
1
Jumper's position:
1-2 : Pseudo-synchronous Status(Fixed as 66MHz)
A more stable and compatible operation condition for non-100MHz based SDRAM
when you are using 100MHz based CPU. This setting is suitable for those users
who are like to remain the usage of current SDRAM module.
2-3 : Synchronous Status(SDRAM Clock= CPU Bus Clock)
Increasing the bus speeds from the traditional 66MHz to 100MHz greatly improves
system performance because the speed at which data traveling between the CPU
and memory is increased by 50%. However, there is one thing you should bear in
mind. Please make sure you are using 125MHz(-8) based or above SDRAM
module.
DIMM3
DIMM2
DIMM1
DIMM 2
BAMK 1
8MB
16MB
32MB x
64MB
1
128MB
SDRAM Clock Selection
1-2 : Fixed as 66MHz
2-3 : SDRAM Clock = CPU Bus Clcok
Hardware Design
1 2 1 2
>
BANK 2
1 2
>
BANK 1
1 2
>
BANK 0
DIMM 3 TOTAL
BANK 2 MEMORY
MAX.=
8MB
384MB
16MB
32MB x
64MB
1
128MB
2-5