EPOX EP-58MVP3C-M Manual page 20

Table of Contents

Advertisement

DRAM Timing: The default value is 60ns.
60ns : 2 (faster) Burst Wait State, for 60~70ns Fast Page Mode/EDO DRAM.
70ns : 3 (slower) Burst Wait State, for 70ns Fast Page Mode/EDO DRAM.
: The default value is 2.
SDRAM Cycle length
2 : 2 HCLKS.
3: 3 HCLKS.
SDRAM Bank Interleave
Disabled : Normal Setting.
2 Bank/4 Bank: SDRAM 2 or 4 Bank Interleave.
: The default value is Enabled.
DRAM Read Pipeline
Disabled : Normal Setting.
Enabled: This field enableds the pipelining of DRAM read cycly.
: The default value is Enabled.
Sustained 3T Write
Disabled : Write Back mode L2 Cache.
Enabled: Write Through mode L2 Cache.
Cache RD+CPU Wt Pipeline
Disabled : Normal Setting.
Enabled: This field enableds the pipelining of Cache reads and CPU writes cycle.
: The default value is Enabled.
Read Around Write
Disabled : Normal Setting.
Enabled: This field enableds the memory read around write cycle.
: The default value is Fastest.
Cache Timing
Fast : Cache burst mode timing = 3 1 1 1 2 1 1 1.
Fastest: Cache burst mode timing = 3 1 1 1 1 1 1 1.
Video BIOS Cacheable
Enabled : Enabled the Video BIOS Cacheable to speed up the VGA Performance.
Disabled: Disabled the Video BIOS Cacheable function.
System BIOS Cacheable
Enabled : Allow caching of the system BIOS ROM at F0000h-FFFFFh.
Disabled: Normal Setting.
Memory Hole at 15M-16M: The default value is Disabled.
Disabled: Normal Setting.
Enabled : This field enableds the main memory (15~16MB) remap to ISA BUS.
: The default value is 2 Bank.
: The default value is Enabled.
: The default value is Enabled.
: The default value is Disabled.
AWARD BIOS 3-7

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents