Advertisement
PERFORMANCE CONSIDERATIONS
A third and less common approach to accommodating memory speed is reducing the 80386
operating frequency. Because a slower clock frequency increases the bus cycle time, fewer
wait states may be required for particular memory devices. At the same time, however,
system performance depends directly on the 80386 clock frequency; execution time increases
in direct proportion to the increase in clock period (reduction in clock frequency). A
12.5-MHz 80386 requires almost 33 percent more time to execute a program than a
16-MHz 80386 operating with the same number of wait states.
The design and application determine whether frequency reduction makes sense. In some
instances, a slight reduction in clock frequency reduces the wait-state requirement and
increases system performance. Table 4-2 shows that a 12.5-MHz 80386 operating with zero
wait states yields better performance than a 16-MHz 80386 operating with two wait states.
Table 4-2. Performance versus Wait States and Operating Frequency
Number of
16 MHz Without
16 MHz With
12.5 MHz Without
12.5 MHz With
Wait States
Pipelining
Pipelining
Pipelining
Pipelining
0
1.00
0.91
0.78
0.71
1
0.81
0.76
0.64
0.59
2
0.66
0.63
0.52
0.49
3
0.57
-
0.45
-
4-3
Advertisement
