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IDLE
T1
(82384 CLK)
BEO#-BE3#,
A2-A31,
M/IO#,D/C#
W/R#
ADS#
NA#
BS16#
READY#
LOCK#
CYCLE 1
NON·PIPELINEO
(WRITE)
T1
T2
LOCAL BUS INTERFACE
IDLE
T1
CLK2
(82384 CLK)
BEO#, BE1#
BE2#, BE3#,
A2-A31,
M/IO#,D/C#
W/R#
ADS#
NA#
BS16#
READY#
LOCK#
00-015
A TRANSFER REQUIRING TWO
CYCLES ON 16·BIT DATA BUS
CYCLE1A
NON·PIPELINED
WRITE)
PART TWO
T1
T2
CYCLE 1
NON·PIPELINED
(WRITE
PART ONE
T1
T2
Figure 3-13. 32-Bit and 16-Bit Bus Cycle Timing
3-21
G30107
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