Misaligned Transfer - Intel 80386 Hardware Reference Manual

LOCAL BUS INTERFACE
FIRST BUS CYCLE: A31 - A2
=
"+
4
"+7
"+3
BE3
HIGH
"+6
SECOND BUS CYCLE: A31 - A2
="
"+7
"+3
DATA BUS
BE3
LOW
"+6
32·BIT MEMORY
BE2
HIGH
"+5
32·BIT MEMORY
DATA BUS
BE2
LOW
"+5
DATA BUS
BEl
LOW
BEl
HIGH
Figure 3-7. Misaligned Transfer
3-11
"+4
"+4
DATA BUS
BEO
LOW
BEO
HIGH
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