Mitsubishi DPLUS 74SB -BKA Service Manual page 142

horizontal blanking to the output of video signal. This enables the
user to blank at the cathodes during horizontal flyback. An optional
capacitor and/or resistor to ground may be needed if noise
interferes with the H Flyback signal.
This feature gives very accurate timing for the horizontal blank-
ing; however, the flyback signal must be very clean. There should
be no ringing or other noise on the flyback signal.
R is used to limit the input current into the IC to a value of +1
LIMIT
mA during flyback and –100 µA during normal forward scan. For
example if an H flyback with a peak of 100V is used, R
100KΩ. The internal input impedance of pin 24 is low to limit the
maximum voltage swing at the input to within the supply rail and
ground. The IC interface circuit creates a digital signal from this
waveform, which is used as the blanking signal at the "Output
Buffer Amp". This signal adds blanking to the video output signal.
Figure 5 shows the H flyback waveforms and the location of
R . A 56 pF capacitor has been added to the H Flyback pin on
LIMIT
the demo board for filtering noise on the H Flyback signal.
H Blank: Some customers may still prefer to use a standard logic
signal for the horizontal blanking. Pin 24 can be adapted to accept
=
LIMIT
a logic input. It is necessary for the current flow into pin 24 to
reverse for proper operation. Therefore the logic signal must be
AC coupled into pin 24. Figure 6 shows the recommended circuit
for a logic signal input. The blank signal must be a positive pulse.
Power Save Mode: There are two modes of power save:
1. Blanking the video
2. Turning off most of the power for maximum power savings.
In the first mode the video is completely blanked. By setting bit-
0 in register 90 to a 1 the video will be completely blanked. This
gives some power saving since there is no beam current in the
monitor. Maximum power saving is obtained in the second
mode. Bits 0 and 1 in register 9 should be set to a 1. Bit 1 in
register 9 turns off the video output stage of the LM1269,
giving a high impedance at the output pin. After bits 0 and 1 of
register 9 are set to a 1, the power supplies to the CRT driver
and CRT can be turned off.
Note: The 5V supply must remain on for proper operation. Since the
LM1269 is a CMOS device its power consumption will be minimal.
External DACs: Four DACs with external outputs are provided
in the LM1269. Normally these DACs will be used for color bal-
7-41